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https://github.com/brain-hackers/u-boot-brain
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![Baruch Siach](/assets/img/avatar_default.png)
Reduce Auto Voltage Scaling VDD limit when core frequency is lower than 1600MHz. This reduces core voltage level from 1.25V to 1.15V, which saves power. The code is taken from Marvell's U-Boot 2013.01 revision 18.06. Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
285 lines
7.1 KiB
C
285 lines
7.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include "seq_exec.h"
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#include "sys_env_lib.h"
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#ifdef CONFIG_ARMADA_38X
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enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
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/* 6820 6810 6811 6828 */
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/* PEX_UNIT_ID */ { 4, 3, 3, 4},
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/* ETH_GIG_UNIT_ID */ { 3, 2, 3, 3},
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/* USB3H_UNIT_ID */ { 2, 2, 2, 2},
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/* USB3D_UNIT_ID */ { 1, 1, 1, 1},
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/* SATA_UNIT_ID */ { 2, 2, 2, 4},
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/* QSGMII_UNIT_ID */ { 1, 0, 0, 1},
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/* XAUI_UNIT_ID */ { 0, 0, 0, 0},
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/* RXAUI_UNIT_ID */ { 0, 0, 0, 0}
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};
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#else /* if (CONFIG_ARMADA_39X) */
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enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
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/* 6920 6928 */
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/* PEX_UNIT_ID */ { 4, 4},
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/* ETH_GIG_UNIT_ID */ { 3, 4},
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/* USB3H_UNIT_ID */ { 1, 2},
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/* USB3D_UNIT_ID */ { 0, 1},
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/* SATA_UNIT_ID */ { 0, 4},
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/* QSGMII_UNIT_ID */ { 0, 1},
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/* XAUI_UNIT_ID */ { 1, 1},
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/* RXAUI_UNIT_ID */ { 1, 1}
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};
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#endif
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u32 g_dev_id = -1;
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u32 mv_board_id_get(void)
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{
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#if defined(CONFIG_TARGET_DB_88F6820_GP)
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return DB_GP_68XX_ID;
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#else
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/*
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* Return 0 here for custom board as this should not be used
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* for custom boards.
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*/
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return 0;
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#endif
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}
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u32 mv_board_tclk_get(void)
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{
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u32 value;
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value = (reg_read(DEVICE_SAMPLE_AT_RESET1_REG) >> 15) & 0x1;
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switch (value) {
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case (0x0):
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return 250000000;
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case (0x1):
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return 200000000;
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default:
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return 0xffffffff;
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}
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}
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u32 mv_board_id_index_get(u32 board_id)
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{
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/*
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* Marvell Boards use 0x10 as base for Board ID:
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* mask MSB to receive index for board ID
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*/
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return board_id & (MARVELL_BOARD_ID_MASK - 1);
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}
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/*
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* sys_env_suspend_wakeup_check
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* DESCRIPTION: Reads GPIO input for suspend-wakeup indication.
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* INPUT: None.
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* OUTPUT:
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* RETURNS: u32 indicating suspend wakeup status:
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* 0 - Not supported,
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* 1 - supported: read magic word detect wakeup,
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* 2 - detected wakeup from GPIO.
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*/
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enum suspend_wakeup_status sys_env_suspend_wakeup_check(void)
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{
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u32 reg, board_id_index, gpio;
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struct board_wakeup_gpio board_gpio[] = MV_BOARD_WAKEUP_GPIO_INFO;
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board_id_index = mv_board_id_index_get(mv_board_id_get());
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if (!(sizeof(board_gpio) / sizeof(struct board_wakeup_gpio) >
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board_id_index)) {
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printf("\n_failed loading Suspend-Wakeup information (invalid board ID)\n");
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return SUSPEND_WAKEUP_DISABLED;
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}
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/*
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* - Detect if Suspend-Wakeup is supported on current board
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* - Fetch the GPIO number for wakeup status input indication
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*/
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if (board_gpio[board_id_index].gpio_num == -1) {
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/* Suspend to RAM is not supported */
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return SUSPEND_WAKEUP_DISABLED;
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} else if (board_gpio[board_id_index].gpio_num == -2) {
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/*
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* Suspend to RAM is supported but GPIO indication is
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* not implemented - Skip
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*/
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return SUSPEND_WAKEUP_ENABLED;
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} else {
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gpio = board_gpio[board_id_index].gpio_num;
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}
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/* Initialize MPP for GPIO (set MPP = 0x0) */
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reg = reg_read(MPP_CONTROL_REG(MPP_REG_NUM(gpio)));
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/* reset MPP21 to 0x0, keep rest of MPP settings*/
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reg &= ~MPP_MASK(gpio);
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reg_write(MPP_CONTROL_REG(MPP_REG_NUM(gpio)), reg);
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/* Initialize GPIO as input */
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reg = reg_read(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)));
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reg |= GPP_MASK(gpio);
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reg_write(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)), reg);
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/*
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* Check GPP for input status from PIC: 0 - regular init,
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* 1 - suspend wakeup
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*/
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reg = reg_read(GPP_DATA_IN_REG(GPP_REG_NUM(gpio)));
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/* if GPIO is ON: wakeup from S2RAM indication detected */
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return (reg & GPP_MASK(gpio)) ? SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED :
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SUSPEND_WAKEUP_DISABLED;
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}
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/*
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* mv_ctrl_dev_id_index_get
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*
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* DESCRIPTION: return SOC device index
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* INPUT: None
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* OUTPUT: None
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* RETURN:
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* return SOC device index
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*/
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u32 sys_env_id_index_get(u32 ctrl_model)
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{
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switch (ctrl_model) {
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case MV_6820_DEV_ID:
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return MV_6820_INDEX;
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case MV_6810_DEV_ID:
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return MV_6810_INDEX;
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case MV_6811_DEV_ID:
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return MV_6811_INDEX;
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case MV_6828_DEV_ID:
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return MV_6828_INDEX;
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case MV_6920_DEV_ID:
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return MV_6920_INDEX;
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case MV_6928_DEV_ID:
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return MV_6928_INDEX;
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default:
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return MV_6820_INDEX;
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}
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}
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u32 sys_env_unit_max_num_get(enum unit_id unit)
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{
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u32 dev_id_index;
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if (unit >= MAX_UNITS_ID) {
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printf("%s: Error: Wrong unit type (%u)\n", __func__, unit);
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return 0;
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}
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dev_id_index = sys_env_id_index_get(sys_env_model_get());
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return sys_env_soc_unit_nums[unit][dev_id_index];
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}
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/*
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* sys_env_model_get
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* DESCRIPTION: Returns 16bit describing the device model (ID) as defined
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* in Vendor ID configuration register
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*/
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u16 sys_env_model_get(void)
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{
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u32 default_ctrl_id, ctrl_id = reg_read(DEV_ID_REG);
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ctrl_id = (ctrl_id & (DEV_ID_REG_DEVICE_ID_MASK)) >>
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DEV_ID_REG_DEVICE_ID_OFFS;
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switch (ctrl_id) {
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case MV_6820_DEV_ID:
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case MV_6810_DEV_ID:
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case MV_6811_DEV_ID:
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case MV_6828_DEV_ID:
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case MV_6920_DEV_ID:
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case MV_6928_DEV_ID:
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return ctrl_id;
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default:
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/* Device ID Default for A38x: 6820 , for A39x: 6920 */
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#ifdef CONFIG_ARMADA_38X
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default_ctrl_id = MV_6820_DEV_ID;
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#else
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default_ctrl_id = MV_6920_DEV_ID;
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#endif
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printf("%s: Error retrieving device ID (%x), using default ID = %x\n",
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__func__, ctrl_id, default_ctrl_id);
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return default_ctrl_id;
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}
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}
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/*
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* sys_env_device_id_get
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* DESCRIPTION: Returns enum (0..7) index of the device model (ID)
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*/
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u32 sys_env_device_id_get(void)
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{
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char *device_id_str[7] = {
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"6810", "6820", "6811", "6828", "NONE", "6920", "6928"
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};
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if (g_dev_id != -1)
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return g_dev_id;
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g_dev_id = reg_read(DEVICE_SAMPLE_AT_RESET1_REG);
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g_dev_id = g_dev_id >> SAR_DEV_ID_OFFS & SAR_DEV_ID_MASK;
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printf("Detected Device ID %s\n", device_id_str[g_dev_id]);
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return g_dev_id;
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}
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/*
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* sys_env_device_rev_get - Get Marvell controller device revision number
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*
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* DESCRIPTION:
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* This function returns 8bit describing the device revision as defined
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* Revision ID Register.
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*
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* INPUT:
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* None.
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*
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* OUTPUT:
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* None.
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*
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* RETURN:
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* 8bit desscribing Marvell controller revision number
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*/
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u8 sys_env_device_rev_get(void)
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{
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u32 value;
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value = reg_read(DEV_VERSION_ID_REG);
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return (value & (REVISON_ID_MASK)) >> REVISON_ID_OFFS;
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}
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void mv_avs_init(void)
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{
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u32 sar_freq;
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if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X)))
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return;
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reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
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reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
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sar_freq = reg_read(DEVICE_SAMPLE_AT_RESET1_REG);
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sar_freq = sar_freq >> SAR_FREQ_OFFSET & SAR_FREQ_MASK;
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/* Set AVS value only for core frequency of 1600MHz or less.
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* For higher frequency leave the default value.
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*/
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if (sar_freq <= 0xd) {
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u32 avs_reg_data = reg_read(AVS_ENABLED_CONTROL);
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avs_reg_data &= ~(AVS_LOW_VDD_LIMIT_MASK
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| AVS_HIGH_VDD_LIMIT_MASK);
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avs_reg_data |= AVS_LOW_VDD_SLOW_VAL | AVS_HIGH_VDD_SLOW_VAL;
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reg_write(AVS_ENABLED_CONTROL, avs_reg_data);
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}
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}
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