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https://github.com/brain-hackers/u-boot-brain
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![]() This function can fail if the device tree runs out of space. Rather than silently booting with an incomplete device tree, allow the failure to be detected. Unfortunately this involves changing a lot of places in the code. I have not changed behvaiour to return an error where one is not currently returned, to avoid unexpected breakage. Eventually it would be nice to allow boards to register functions to be called to update the device tree. This would avoid all the many functions to do this. However it's not clear yet if this should be done using driver model or with a linker list. This work is left for later. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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.. | ||
Kconfig | ||
MAINTAINERS | ||
Makefile | ||
mt46v32m16-75.h | ||
pcm030.c | ||
README |
To build RAMBOOT, replace this section the main Makefile pcm030_config \ pcm030_RAMBOOT_config \ pcm030_LOWBOOT_config: unconfig @ >include/config.h @[ -z "$(findstring LOWBOOT_,$@)" ] || \ { echo "CONFIG_SYS_TEXT_BASE = 0xFF000000" >board/phytec/pcm030/config.tmp ; \ echo "... with LOWBOOT configuration" ; \ } @[ -z "$(findstring RAMBOOT_,$@)" ] || \ { echo "CONFIG_SYS_TEXT_BASE = 0x00100000" >board/phycore_mpc5200b_tiny/\ config.tmp ; \ echo "... with RAMBOOT configuration" ; \ echo "... remember to make sure that MBAR is already \ switched to 0xF0000000 !!!" ; \ } @$(MKCONFIG) -a pcm030 ppc mpc5xxx pcm030 phytec @ echo "remember to set pcm030_REV to 0 for rev 1245.0 rev or to 1 for rev 1245.1" Alternative SDRAM settings: #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 #define SDRAM_CONTROL 0x715f0f00 #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 /* Settings for XLB = 99 MHz */ #define SDRAM_MODE 0x008D0000 #define SDRAM_EMODE 0x40090000 #define SDRAM_CONTROL 0x714b0f00 #define SDRAM_CONFIG1 0x63611730 #define SDRAM_CONFIG2 0x47670000 The board ships default with the environment in EEPROM Moving the environment to flash can be more reliable #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xfe0000) #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000