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https://github.com/brain-hackers/u-boot-brain
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ef76025a99
This patch adds the following changes to designware ethernet driver found on the ST SPEAr SoC: - Don't init MAC & PHY upon startup. This causes a delay, waiting for the auto negotiation to complete. And we don't want this delay to always happen. Especially not on platforms where ethernet is not used at all (e.g. booting via flash). Instead postpone the MAC / PHY configuration to the stage, where ethernet is first used. - Add possibility for board specific PHY init code. This is needed for example on the X600 board, where the Vitesse PHY needs to be configured for GMII mode. This board specific PHY init is done via the function designware_board_phy_init(). And this driver now adds a weak default which can be overridden by board code. - Use common functions miiphy_speed() & miiphy_duplex() to read link status from PHY. - Print status and progress of auto negotiation. - Print link status (speed, dupex) upon first usage. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
260 lines
6.9 KiB
C
260 lines
6.9 KiB
C
/*
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* (C) Copyright 2009
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* Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _SPEAR_COMMON_H
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#define _SPEAR_COMMON_H
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/*
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* Common configurations used for both spear3xx as well as spear6xx
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*/
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/* U-boot Load Address */
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#define CONFIG_SYS_TEXT_BASE 0x00700000
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/* Ethernet driver configuration */
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#define CONFIG_MII
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#define CONFIG_DESIGNWARE_ETH
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#define CONFIG_DW_SEARCH_PHY
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#define CONFIG_DW0_PHY 1
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#define CONFIG_NET_MULTI
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#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
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#define CONFIG_DW_AUTONEG
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#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
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/* USBD driver configuration */
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#if defined(CONFIG_SPEAR_USBTTY)
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#define CONFIG_DW_UDC
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#define CONFIG_USB_DEVICE
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#define CONFIG_USBD_HS
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#define CONFIG_USB_TTY
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#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC"
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#define CONFIG_USBD_MANUFACTURER "ST Microelectronics"
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#endif
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#define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0"
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/* I2C driver configuration */
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#define CONFIG_HARD_I2C
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#define CONFIG_DW_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 0x02
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#define CONFIG_I2C_CHIPADDRESS 0x50
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/* Timer, HZ specific defines */
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#define CONFIG_SYS_HZ 1000
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/* Flash configuration */
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#if defined(CONFIG_FLASH_PNOR)
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#define CONFIG_SPEAR_EMI
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#else
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#define CONFIG_ST_SMI
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#endif
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#if defined(CONFIG_ST_SMI)
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#define CONFIG_SYS_MAX_FLASH_BANKS 2
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#define CONFIG_SYS_FLASH_BASE 0xF8000000
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#define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000
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#define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000
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#define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \
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CONFIG_SYS_CS1_FLASH_BASE}
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ)
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#endif
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/*
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* Serial Configuration (PL011)
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* CONFIG_PL01x_PORTS is defined in specific files
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*/
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
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57600, 115200 }
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#define CONFIG_SYS_LOADS_BAUD_CHANGE
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/* NAND FLASH Configuration */
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#define CONFIG_SYS_NAND_SELF_INIT
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_NAND_FSMC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_QUIET_TEST
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/*
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* Command support defines
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*/
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_ENV
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_SAVES
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <config_cmd_default.h>
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/*
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* Default Environment Varible definitions
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*/
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#if defined(CONFIG_SPEAR_USBTTY)
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#define CONFIG_BOOTDELAY -1
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#else
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#define CONFIG_BOOTDELAY 1
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#endif
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#define CONFIG_ENV_OVERWRITE
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/*
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* U-Boot Environment placing definitions.
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*/
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#if defined(CONFIG_ENV_IS_IN_FLASH)
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#ifdef CONFIG_ST_SMI
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/*
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* Environment is in serial NOR flash
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*/
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#define CONFIG_SYS_MONITOR_LEN 0x00040000
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#define CONFIG_ENV_SECT_SIZE 0x00010000
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#define CONFIG_FSMTDBLK "/dev/mtdblock3 "
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#define CONFIG_BOOTCOMMAND "bootm 0xf8050000"
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#elif defined(CONFIG_SPEAR_EMI)
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/*
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* Environment is in parallel NOR flash
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*/
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#define CONFIG_SYS_MONITOR_LEN 0x00060000
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#define CONFIG_ENV_SECT_SIZE 0x00020000
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#define CONFIG_FSMTDBLK "/dev/mtdblock3 "
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#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \
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"0x4C0000; bootm 0x1600000"
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#endif
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
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CONFIG_SYS_MONITOR_LEN)
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#elif defined(CONFIG_ENV_IS_IN_NAND)
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/*
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* Environment is in NAND
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*/
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#define CONFIG_ENV_OFFSET 0x60000
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#define CONFIG_ENV_RANGE 0x10000
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#define CONFIG_FSMTDBLK "/dev/mtdblock7 "
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#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \
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"0x80000 0x4C0000; " \
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"bootm 0x1600000"
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#endif
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#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \
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"mem=128M " \
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"root="CONFIG_FSMTDBLK \
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"rootfstype=jffs2"
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#define CONFIG_NFSBOOTCOMMAND \
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"bootp; " \
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"setenv bootargs root=/dev/nfs rw " \
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"nfsroot=$(serverip):$(rootpath) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):" \
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"$(netmask):$(hostname):$(netdev):off " \
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"console=ttyAMA0,115200 $(othbootargs);" \
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"bootm; "
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#define CONFIG_RAMBOOTCOMMAND \
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"setenv bootargs root=/dev/ram rw " \
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"console=ttyAMA0,115200 $(othbootargs);" \
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CONFIG_BOOTCOMMAND
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#define CONFIG_ENV_SIZE 0x02000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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/* Miscellaneous configurable options */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_MISC_INIT_R
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_AUTOBOOT_KEYED
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#define CONFIG_AUTOBOOT_STOP_STR " "
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#define CONFIG_AUTOBOOT_PROMPT \
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"Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
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#define CONFIG_SYS_MEMTEST_START 0x00800000
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#define CONFIG_SYS_MEMTEST_END 0x04000000
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#define CONFIG_SYS_MALLOC_LEN (1024*1024)
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#define CONFIG_IDENT_STRING "-SPEAr"
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "u-boot> "
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_LOAD_ADDR 0x00800000
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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/* Stack sizes */
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#define CONFIG_STACKSIZE (128*1024)
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024)
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#define CONFIG_STACKSIZE_FIQ (4*1024)
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#endif
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 0x00000000
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#define PHYS_SDRAM_1_MAXSIZE 0x40000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#endif
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