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https://github.com/brain-hackers/u-boot-brain
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2d481b2e3e
This adds the driver for the PWM controller found in the Amlogic SoCs. This PWM is only a set of Gates, Dividers and Counters: PWM output is achieved by calculating a clock that permits calculating two periods (low and high). The counter then has to be set to switch after N cycles for the first half period. The hardware has no "polarity" setting. This driver reverses the period cycles (the low length is inverted with the high length) for PWM_POLARITY_INVERSED. Disabling the PWM stops the output immediately (without waiting for the current period to complete first). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
22 lines
628 B
Makefile
22 lines
628 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2001
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# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
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#ccflags-y += -DDEBUG
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obj-$(CONFIG_DM_PWM) += pwm-uclass.o
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obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o
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obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
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obj-$(CONFIG_PWM_MESON) += pwm-meson.o
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obj-$(CONFIG_PWM_MTK) += pwm-mtk.o
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obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o
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obj-$(CONFIG_PWM_SANDBOX) += sandbox_pwm.o
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obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o
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obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o
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obj-$(CONFIG_PWM_SUNXI) += sunxi_pwm.o
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