mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 13:46:17 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
151 lines
3.9 KiB
C
151 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <asm/fsl_lbc.h>
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#ifdef CONFIG_MPC85xx
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/* Boards should provide their own version of this if they use lbc sdram */
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static void __lbc_sdram_init(void)
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{
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/* Do nothing */
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}
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void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init")));
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#endif
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void print_lbc_regs(void)
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{
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int i;
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printf("\nLocal Bus Controller Registers\n");
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for (i = 0; i < 8; i++) {
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printf("BR%d\t0x%08X\tOR%d\t0x%08X\n",
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i, get_lbc_br(i), i, get_lbc_or(i));
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}
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printf("LBCR\t0x%08X\tLCRR\t0x%08X\n",
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get_lbc_lbcr(), get_lbc_lcrr());
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}
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void init_early_memctl_regs(void)
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{
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uint init_br1 = 1;
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#ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
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/* Set the local bus monitor timeout value to the maximum */
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clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf);
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#endif
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#ifdef CONFIG_MPC85xx
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/* if cs1 is already set via debugger, leave cs0/cs1 alone */
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if (get_lbc_br(1) & BR_V)
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init_br1 = 0;
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#endif
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/*
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* Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at
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* preliminary addresses - these have to be modified later
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* when FLASH size has been determined
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*/
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#if defined(CONFIG_SYS_OR0_REMAP)
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set_lbc_or(0, CONFIG_SYS_OR0_REMAP);
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#endif
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#if defined(CONFIG_SYS_OR1_REMAP)
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set_lbc_or(1, CONFIG_SYS_OR1_REMAP);
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#endif
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/* now restrict to preliminary range */
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if (init_br1) {
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#if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
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set_lbc_br(0, CONFIG_SYS_BR0_PRELIM);
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set_lbc_or(0, CONFIG_SYS_OR0_PRELIM);
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#endif
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#if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
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set_lbc_or(1, CONFIG_SYS_OR1_PRELIM);
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set_lbc_br(1, CONFIG_SYS_BR1_PRELIM);
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#endif
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}
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#if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
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set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
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set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
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#endif
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#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
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set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
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set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
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#endif
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#if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
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set_lbc_or(4, CONFIG_SYS_OR4_PRELIM);
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set_lbc_br(4, CONFIG_SYS_BR4_PRELIM);
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#endif
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#if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
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set_lbc_or(5, CONFIG_SYS_OR5_PRELIM);
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set_lbc_br(5, CONFIG_SYS_BR5_PRELIM);
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#endif
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#if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
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set_lbc_or(6, CONFIG_SYS_OR6_PRELIM);
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set_lbc_br(6, CONFIG_SYS_BR6_PRELIM);
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#endif
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#if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
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set_lbc_or(7, CONFIG_SYS_OR7_PRELIM);
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set_lbc_br(7, CONFIG_SYS_BR7_PRELIM);
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#endif
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}
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/*
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* Configures a UPM. The function requires the respective MxMR to be set
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* before calling this function. "size" is the number or entries, not a sizeof.
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*/
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void upmconfig(uint upm, uint *table, uint size)
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{
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fsl_lbc_t *lbc = LBC_BASE_ADDR;
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int i, mad, old_mad = 0;
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u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK);
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u32 msel = BR_UPMx_TO_MSEL(upm);
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u32 *mxmr = &lbc->mamr + upm;
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volatile u8 *dummy = NULL;
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if (upm < UPMA || upm > UPMC) {
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printf("Error: %s() Bad UPM index %d\n", __func__, upm);
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hang();
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}
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/*
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* Find the address for the dummy write - scan all of the BRs until we
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* find one matching the UPM and extract the base address bits from it.
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*/
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for (i = 0; i < 8; i++) {
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if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) {
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dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA);
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break;
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}
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}
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if (!dummy) {
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printf("Error: %s() No matching BR\n", __func__);
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hang();
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}
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/* Program UPM using steps outlined by the reference manual */
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for (i = 0; i < size; i++) {
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out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i);
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out_be32(&lbc->mdr, table[i]);
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(void)in_be32(&lbc->mdr);
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*dummy = 0;
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do {
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mad = in_be32(mxmr) & MxMR_MAD_MSK;
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} while (mad <= old_mad && !(!mad && i == (size-1)));
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old_mad = mad;
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}
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/* Return to normal operation */
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out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM);
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}
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