mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
140 lines
2.6 KiB
C
140 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Bluegiga APX4 Development Kit
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*
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* Copyright (C) 2012 Bluegiga Technologies Oy
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*
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* Authors:
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* Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
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* Lauri Hintsala <lauri.hintsala@bluegiga.com>
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*
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* Based on m28evk.c:
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*/
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#include <common.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <linux/mii.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Functions */
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int board_early_init_f(void)
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{
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/* IO0 clock at 480MHz */
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mxs_set_ioclk(MXC_IOCLK0, 480000);
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/* IO1 clock at 480MHz */
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mxs_set_ioclk(MXC_IOCLK1, 480000);
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/* SSP0 clock at 96MHz */
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mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
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return 0;
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}
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int dram_init(void)
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{
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return mxs_dram_init();
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}
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int board_init(void)
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{
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/* Adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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#ifdef CONFIG_CMD_MMC
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int board_mmc_init(bd_t *bis)
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{
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return mxsmmc_initialize(bis, 0, NULL, NULL);
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}
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#endif
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#ifdef CONFIG_CMD_NET
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#define MII_PHY_CTRL2 0x1f
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int fecmxc_mii_postcall(int phy)
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{
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/* change PHY RMII clock to 50MHz */
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miiphy_write("FEC", 0, MII_PHY_CTRL2, 0x8180);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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int ret;
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struct eth_device *dev;
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ret = cpu_eth_init(bis);
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if (ret) {
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printf("FEC MXS: Unable to init FEC clocks\n");
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return ret;
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}
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ret = fecmxc_initialize(bis);
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if (ret) {
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printf("FEC MXS: Unable to init FEC\n");
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return ret;
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}
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dev = eth_get_dev_by_name("FEC");
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if (!dev) {
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printf("FEC MXS: Unable to get FEC device entry\n");
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return -EINVAL;
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}
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ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
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if (ret) {
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printf("FEC MXS: Unable to register FEC MII postcall\n");
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return ret;
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}
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return ret;
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}
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#endif
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#ifdef CONFIG_SERIAL_TAG
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#define MXS_OCOTP_MAX_TIMEOUT 1000000
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void get_board_serial(struct tag_serialnr *serialnr)
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{
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struct mxs_ocotp_regs *ocotp_regs =
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(struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
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serialnr->high = 0;
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serialnr->low = 0;
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writel(OCOTP_CTRL_RD_BANK_OPEN, &ocotp_regs->hw_ocotp_ctrl_set);
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if (mxs_wait_mask_clr(&ocotp_regs->hw_ocotp_ctrl_reg, OCOTP_CTRL_BUSY,
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MXS_OCOTP_MAX_TIMEOUT)) {
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printf("MXS: Can't get serial number from OCOTP\n");
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return;
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}
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serialnr->low = readl(&ocotp_regs->hw_ocotp_cust3);
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}
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#endif
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#ifdef CONFIG_REVISION_TAG
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u32 get_board_rev(void)
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{
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if (env_get("revision#") != NULL)
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return simple_strtoul(env_get("revision#"), NULL, 10);
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return 0;
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}
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#endif
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