u-boot-brain/board/a3m071/is46r16320d.h
Stefan Roese d4451d3503 mpc5200: Add a4m2k board port
This patch adds the a4m2k MPC5200B board port. Its a derivate of
the a3m071 board with only minor changes.

Additionally this patch includes some clean-up changes:
- Remove I2C support from a3m071 as its unused
- Fix/enhance default env variables
- Fix some comments
- Add newly introduced CONFIG_SPL_TARGET to automatically build
  "u-boot-img.bin"
- Fix dtb patching in READ desciption for SPL Linux booting:
  "fdt chosen" needs to get called to patch/create the chosen node.
- Add missing call to spl_board_init():
  Define CONFIG_SPL_BOARD_INIT so that spl_board_init() will get
  called in the SPL version.

Signed-off-by: Stefan Roese <sr@denx.de>
2013-03-09 08:17:51 +01:00

36 lines
1.1 KiB
C

/*
* (C) Copyright 2004
* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#define SDRAM_DDR /* is DDR */
#if defined(CONFIG_MPC5200)
/* Settings for XLB = 132 MHz */
/* see is46r16320d datasheet and MPC5200UM chap. 8.6.1. */
/* SDRAM Config Standard timing */
#define SDRAM_MODE 0x008d0000
#define SDRAM_EMODE 0x40010000
#define SDRAM_CONTROL 0x70430f00
#define SDRAM_CONFIG1 0x33622930
#define SDRAM_CONFIG2 0x46670000
#define SDRAM_TAPDELAY 0x10000000
#else
#error CONFIG_MPC5200 not defined
#endif