mirror of
https://github.com/brain-hackers/u-boot-brain
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4ae8bc4392
This patch adds SPL support for SPEAr600. Currently only SNOR (Serial NOR) flash support is included. Other boot devices (NAND, MMC, USB ...) may be added with later patches. Tested on the STM SPEAr600 evaluation and x600 SPEAr600 boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
92 lines
2.9 KiB
C
92 lines
2.9 KiB
C
/*
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* (C) Copyright 2009
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* Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ASM_ARCH_HARDWARE_H
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#define _ASM_ARCH_HARDWARE_H
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#define CONFIG_SYS_USBD_BASE 0xE1100000
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#define CONFIG_SYS_PLUG_BASE 0xE1200000
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#define CONFIG_SYS_FIFO_BASE 0xE1000800
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#define CONFIG_SYS_SMI_BASE 0xFC000000
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#define CONFIG_SPEAR_SYSCNTLBASE 0xFCA00000
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#define CONFIG_SPEAR_TIMERBASE 0xFC800000
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#define CONFIG_SPEAR_MISCBASE 0xFCA80000
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#define CONFIG_SPEAR_ETHBASE 0xE0800000
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#define CONFIG_SPEAR_MPMCBASE 0xFC600000
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#define CONFIG_SSP1_BASE 0xD0100000
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#define CONFIG_SSP2_BASE 0xD0180000
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#define CONFIG_SSP3_BASE 0xD8180000
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#define CONFIG_GPIO_BASE 0xD8100000
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#define CONFIG_SYS_NAND_CLE (1 << 16)
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#define CONFIG_SYS_NAND_ALE (1 << 17)
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#if defined(CONFIG_SPEAR600)
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#define CONFIG_SYS_I2C_BASE 0xD0200000
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#define CONFIG_SYS_FSMC_BASE 0xD1800000
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#define CONFIG_FSMC_NAND_BASE 0xD2000000
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#define CONFIG_SPEAR_BOOTSTRAPCFG 0xFCA80000
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#define CONFIG_SPEAR_BOOTSTRAPSHFT 16
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#define CONFIG_SPEAR_BOOTSTRAPMASK 0xB
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#define CONFIG_SPEAR_ONLYSNORBOOT 0xA
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#define CONFIG_SPEAR_NORNANDBOOT 0xB
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#define CONFIG_SPEAR_NORNAND8BOOT 0x8
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#define CONFIG_SPEAR_NORNAND16BOOT 0x9
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#define CONFIG_SPEAR_USBBOOT 0x8
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#define CONFIG_SPEAR_MPMCREGS 100
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#elif defined(CONFIG_SPEAR300)
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#define CONFIG_SYS_I2C_BASE 0xD0180000
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#define CONFIG_SYS_FSMC_BASE 0x94000000
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#elif defined(CONFIG_SPEAR310)
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#define CONFIG_SYS_I2C_BASE 0xD0180000
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#define CONFIG_SYS_FSMC_BASE 0x44000000
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#undef CONFIG_SYS_NAND_CLE
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#undef CONFIG_SYS_NAND_ALE
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#define CONFIG_SYS_NAND_CLE (1 << 17)
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#define CONFIG_SYS_NAND_ALE (1 << 16)
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#define CONFIG_SPEAR_EMIBASE 0x4F000000
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#define CONFIG_SPEAR_RASBASE 0xB4000000
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#define CONFIG_SYS_MACB0_BASE 0xB0000000
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#define CONFIG_SYS_MACB1_BASE 0xB0800000
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#define CONFIG_SYS_MACB2_BASE 0xB1000000
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#define CONFIG_SYS_MACB3_BASE 0xB1800000
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#elif defined(CONFIG_SPEAR320)
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#define CONFIG_SYS_I2C_BASE 0xD0180000
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#define CONFIG_SYS_FSMC_BASE 0x4C000000
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#define CONFIG_SPEAR_EMIBASE 0x40000000
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#define CONFIG_SPEAR_RASBASE 0xB3000000
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#define CONFIG_SYS_MACB0_BASE 0xAA000000
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#endif
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#endif /* _ASM_ARCH_HARDWARE_H */
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