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29d53d19f3
This patch allow to override CONFIG_SYS_TCLK from board configuration files. This is needed for the Network Space v2 which use a non standard core clock frequency (166MHz instead of 200MHz for a 6281 SoC). As a possible enhancement for 6281 and 6282 devices, TCLK could be dynamically detected by checking the Sample at Reset register bit 21. Additionally this patch fix a typo. Signed-off-by: Simon Guinot <sguinot@lacie.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
40 lines
1.3 KiB
C
40 lines
1.3 KiB
C
/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* Header file for Feroceon CPU core 88FR131 Based KW88F6281 SOC.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef _ASM_ARCH_KW88F6281_H
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#define _ASM_ARCH_KW88F6281_H
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/* SOC specific definitions */
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#define KW88F6281_REGS_PHYS_BASE 0xf1000000
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#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
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/* TCLK Core Clock definition */
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#ifndef CONFIG_SYS_TCLK
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#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
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#endif
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#endif /* _ASM_ARCH_KW88F6281_H */
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