Philipp Tomsich 8fa6979beb rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5 ... This change adds support for configuring the module clocks for SPI1 and SPI5 from the 594MHz GPLL. Note that the driver (rk_spi.c) always sets this to 99MHz, but the implemented functionality is more general and will also support different clock configurations. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>		2017-05-10 13:37:21 -06:00
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clk_rk3036.c	rockchip: clk: rk3036: add ciu_clk entry for eMMC/SDIO	2017-05-10 13:37:21 -06:00
clk_rk3188.c	rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIO	2017-05-10 13:37:21 -06:00
clk_rk3288.c	rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIO	2017-05-10 13:37:21 -06:00
clk_rk3328.c	rockchip: clk: rk3328: add ciu_clk entry for eMMC/SDMMC	2017-05-10 13:37:21 -06:00
clk_rk3399.c	rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5	2017-05-10 13:37:21 -06:00
Makefile	rockchip: rk3328: add clock driver	2017-03-16 16:03:46 -06:00