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![Chunfeng Yun](/assets/img/avatar_default.png)
This patch adds support for the MediaTek USB3 DRD controller, its host side is based on xHCI, this driver supports device mode and host mode. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
370 lines
8.0 KiB
C
370 lines
8.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
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*/
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#include <common.h>
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#include <dm/lists.h>
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#include <linux/iopoll.h>
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#include "mtu3.h"
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#include "mtu3_dr.h"
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void ssusb_set_force_mode(struct ssusb_mtk *ssusb,
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enum mtu3_dr_force_mode mode)
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{
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u32 value;
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value = mtu3_readl(ssusb->ippc_base, SSUSB_U2_CTRL(0));
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switch (mode) {
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case MTU3_DR_FORCE_DEVICE:
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value |= SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG;
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break;
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case MTU3_DR_FORCE_HOST:
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value |= SSUSB_U2_PORT_FORCE_IDDIG;
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value &= ~SSUSB_U2_PORT_RG_IDDIG;
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break;
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case MTU3_DR_FORCE_NONE:
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value &= ~(SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG);
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break;
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default:
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return;
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}
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mtu3_writel(ssusb->ippc_base, SSUSB_U2_CTRL(0), value);
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}
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/* u2-port0 should be powered on and enabled; */
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int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
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{
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void __iomem *ibase = ssusb->ippc_base;
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u32 value, check_val;
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int ret;
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check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
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SSUSB_REF_RST_B_STS;
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ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
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((value & check_val) == check_val), 10000);
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if (ret) {
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dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
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return ret;
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}
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ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
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(value & SSUSB_U2_MAC_SYS_RST_B_STS), 10000);
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if (ret) {
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dev_err(ssusb->dev, "mac2 clock is not stable\n");
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return ret;
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}
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return 0;
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}
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int ssusb_phy_setup(struct ssusb_mtk *ssusb)
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{
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struct udevice *dev = ssusb->dev;
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struct phy_bulk *phys = &ssusb->phys;
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int ret;
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ret = generic_phy_get_bulk(dev, phys);
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if (ret)
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return ret;
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ret = generic_phy_init_bulk(phys);
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if (ret)
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return ret;
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ret = generic_phy_power_on_bulk(phys);
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if (ret)
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generic_phy_exit_bulk(phys);
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return ret;
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}
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void ssusb_phy_shutdown(struct ssusb_mtk *ssusb)
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{
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generic_phy_power_off_bulk(&ssusb->phys);
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generic_phy_exit_bulk(&ssusb->phys);
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}
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static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
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{
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int ret = 0;
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ret = regulator_set_enable(ssusb->vusb33_supply, true);
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if (ret < 0 && ret != -ENOSYS) {
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dev_err(ssusb->dev, "failed to enable vusb33\n");
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goto vusb33_err;
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}
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ret = clk_enable_bulk(&ssusb->clks);
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if (ret)
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goto clks_err;
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ret = ssusb_phy_setup(ssusb);
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if (ret) {
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dev_err(ssusb->dev, "failed to setup phy\n");
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goto phy_err;
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}
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return 0;
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phy_err:
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clk_disable_bulk(&ssusb->clks);
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clks_err:
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regulator_set_enable(ssusb->vusb33_supply, false);
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vusb33_err:
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return ret;
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}
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static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
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{
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clk_disable_bulk(&ssusb->clks);
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regulator_set_enable(ssusb->vusb33_supply, false);
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ssusb_phy_shutdown(ssusb);
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}
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static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
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{
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/* reset whole ip (xhci & u3d) */
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mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
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udelay(1);
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mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
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}
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static int get_ssusb_rscs(struct udevice *dev, struct ssusb_mtk *ssusb)
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{
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struct udevice *child;
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int ret;
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ret = device_get_supply_regulator(dev, "vusb33-supply",
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&ssusb->vusb33_supply);
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if (ret) /* optional, ignore error */
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dev_warn(dev, "can't get optional vusb33 %d\n", ret);
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ret = device_get_supply_regulator(dev, "vbus-supply",
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&ssusb->vbus_supply);
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if (ret) /* optional, ignore error */
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dev_warn(dev, "can't get optional vbus regulator %d!\n", ret);
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ret = clk_get_bulk(dev, &ssusb->clks);
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if (ret) {
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dev_err(dev, "failed to get clocks %d!\n", ret);
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return ret;
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}
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ssusb->ippc_base = devfdt_remap_addr_name(dev, "ippc");
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if (!ssusb->ippc_base) {
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dev_err(dev, "error mapping memory for ippc\n");
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return -ENODEV;
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}
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ret = device_find_first_child(dev, &child);
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if (ret || !child) {
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dev_err(dev, "failed to get child %d!\n", ret);
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return ret;
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}
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ssusb->mac_base = devfdt_remap_addr_name(child, "mac");
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if (!ssusb->mac_base) {
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dev_err(dev, "error mapping memory for mac\n");
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return -ENODEV;
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}
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ssusb->dr_mode = usb_get_dr_mode(child->node);
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if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN ||
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ssusb->dr_mode == USB_DR_MODE_OTG)
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ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
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if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
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ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
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else if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
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ssusb->dr_mode = USB_DR_MODE_HOST;
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dev_info(dev, "dr_mode: %d, ippc: 0x%p, mac: 0x%p\n",
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ssusb->dr_mode, ssusb->ippc_base, ssusb->mac_base);
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return 0;
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}
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static int mtu3_probe(struct udevice *dev)
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{
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struct ssusb_mtk *ssusb = dev_get_priv(dev);
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int ret = -ENOMEM;
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ssusb->dev = dev;
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ret = get_ssusb_rscs(dev, ssusb);
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if (ret)
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return ret;
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ret = ssusb_rscs_init(ssusb);
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if (ret)
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return ret;
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ssusb_ip_sw_reset(ssusb);
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return 0;
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}
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static int mtu3_remove(struct udevice *dev)
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{
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struct ssusb_mtk *ssusb = dev_to_ssusb(dev);
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ssusb_rscs_exit(ssusb);
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return 0;
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}
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static const struct udevice_id ssusb_of_match[] = {
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{.compatible = "mediatek,ssusb",},
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{},
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};
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#if CONFIG_IS_ENABLED(DM_USB_GADGET)
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int dm_usb_gadget_handle_interrupts(struct udevice *dev)
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{
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struct mtu3 *mtu = dev_get_priv(dev);
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mtu3_irq(0, mtu);
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return 0;
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}
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static int mtu3_gadget_probe(struct udevice *dev)
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{
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struct ssusb_mtk *ssusb = dev_to_ssusb(dev->parent);
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struct mtu3 *mtu = dev_get_priv(dev);
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mtu->dev = dev;
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ssusb->u3d = mtu;
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return ssusb_gadget_init(ssusb);
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}
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static int mtu3_gadget_remove(struct udevice *dev)
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{
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struct mtu3 *mtu = dev_get_priv(dev);
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ssusb_gadget_exit(mtu->ssusb);
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return 0;
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}
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U_BOOT_DRIVER(mtu3_peripheral) = {
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.name = "mtu3-peripheral",
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.id = UCLASS_USB_GADGET_GENERIC,
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.of_match = ssusb_of_match,
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.probe = mtu3_gadget_probe,
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.remove = mtu3_gadget_remove,
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.priv_auto_alloc_size = sizeof(struct mtu3),
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};
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#endif
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#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
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(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
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static int mtu3_host_probe(struct udevice *dev)
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{
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struct ssusb_mtk *ssusb = dev_to_ssusb(dev->parent);
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struct mtu3_host *u3h = dev_get_priv(dev);
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struct xhci_hcor *hcor;
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int rc;
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u3h->dev = dev;
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ssusb->u3h = u3h;
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rc = ssusb_host_init(ssusb);
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if (rc)
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return rc;
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u3h->ctrl.quirks = XHCI_MTK_HOST;
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hcor = (struct xhci_hcor *)((uintptr_t)u3h->hcd +
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HC_LENGTH(xhci_readl(&u3h->hcd->cr_capbase)));
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return xhci_register(dev, u3h->hcd, hcor);
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}
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static int mtu3_host_remove(struct udevice *dev)
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{
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struct mtu3_host *u3h = dev_get_priv(dev);
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xhci_deregister(dev);
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ssusb_host_exit(u3h->ssusb);
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return 0;
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}
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U_BOOT_DRIVER(mtu3_host) = {
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.name = "mtu3-host",
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.id = UCLASS_USB,
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.of_match = ssusb_of_match,
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.probe = mtu3_host_probe,
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.remove = mtu3_host_remove,
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.priv_auto_alloc_size = sizeof(struct mtu3_host),
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.ops = &xhci_usb_ops,
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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#endif
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static int mtu3_glue_bind(struct udevice *parent)
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{
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struct udevice *dev;
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enum usb_dr_mode dr_mode;
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const char *driver;
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const char *name;
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ofnode node;
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int ret;
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node = ofnode_by_compatible(parent->node, "mediatek,ssusb");
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if (!ofnode_valid(node))
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return -ENODEV;
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name = ofnode_get_name(node);
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dr_mode = usb_get_dr_mode(node);
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switch (dr_mode) {
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#if CONFIG_IS_ENABLED(DM_USB_GADGET)
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case USB_DR_MODE_PERIPHERAL:
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case USB_DR_MODE_OTG:
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dev_dbg(parent, "%s: dr_mode: peripheral\n", __func__);
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driver = "mtu3-peripheral";
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break;
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#endif
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#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
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(!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
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case USB_DR_MODE_HOST:
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dev_dbg(parent, "%s: dr_mode: host\n", __func__);
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driver = "mtu3-host";
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break;
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#endif
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default:
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dev_err(parent, "%s: unsupported dr_mode %d\n",
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__func__, dr_mode);
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return -ENODEV;
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};
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dev_dbg(parent, "%s: node name: %s, driver %s, dr_mode %d\n",
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__func__, name, driver, dr_mode);
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ret = device_bind_driver_to_node(parent, driver, name, node, &dev);
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if (ret)
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dev_err(parent, "%s: not able to bind usb device mode\n",
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__func__);
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return ret;
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}
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static const struct udevice_id mtu3_of_match[] = {
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{.compatible = "mediatek,mtu3",},
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{},
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};
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U_BOOT_DRIVER(mtu3) = {
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.name = "mtu3",
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.id = UCLASS_NOP,
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.of_match = mtu3_of_match,
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.bind = mtu3_glue_bind,
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.probe = mtu3_probe,
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.remove = mtu3_remove,
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.priv_auto_alloc_size = sizeof(struct ssusb_mtk),
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};
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