mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
70 lines
1.4 KiB
ArmAsm
70 lines
1.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
|
|
#include <config.h>
|
|
#include <linux/linkage.h>
|
|
|
|
ENTRY(save_boot_params)
|
|
stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */
|
|
ldr r12, =CONFIG_SPL_BOOTROM_SAVE
|
|
str sp, [r12]
|
|
b save_boot_params_ret
|
|
ENDPROC(save_boot_params)
|
|
|
|
ENTRY(return_to_bootrom)
|
|
ldr r12, =CONFIG_SPL_BOOTROM_SAVE
|
|
ldr sp, [r12]
|
|
mov r0, #0x0 /* @ return value: 0x0 NO_ERR */
|
|
ldmfd sp!, {r0 - r12, pc} /* @ restore regs and return */
|
|
ENDPROC(return_to_bootrom)
|
|
|
|
/*
|
|
* cache_inv - invalidate Cache line
|
|
* r0 - dest
|
|
*/
|
|
.global cache_inv
|
|
.type cache_inv, %function
|
|
cache_inv:
|
|
|
|
stmfd sp!, {r1-r12}
|
|
|
|
mcr p15, 0, r0, c7, c6, 1
|
|
|
|
ldmfd sp!, {r1-r12}
|
|
bx lr
|
|
|
|
|
|
/*
|
|
* flush_l1_v6 - l1 cache clean invalidate
|
|
* r0 - dest
|
|
*/
|
|
.global flush_l1_v6
|
|
.type flush_l1_v6, %function
|
|
flush_l1_v6:
|
|
|
|
stmfd sp!, {r1-r12}
|
|
|
|
mcr p15, 0, r0, c7, c10, 5 /* @ data memory barrier */
|
|
mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
|
|
mcr p15, 0, r0, c7, c10, 4 /* @ data sync barrier */
|
|
|
|
ldmfd sp!, {r1-r12}
|
|
bx lr
|
|
|
|
|
|
/*
|
|
* flush_l1_v7 - l1 cache clean invalidate
|
|
* r0 - dest
|
|
*/
|
|
.global flush_l1_v7
|
|
.type flush_l1_v7, %function
|
|
flush_l1_v7:
|
|
|
|
stmfd sp!, {r1-r12}
|
|
|
|
dmb /* @data memory barrier */
|
|
mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
|
|
dsb /* @data sync barrier */
|
|
|
|
ldmfd sp!, {r1-r12}
|
|
bx lr
|