mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
7d899c14cc
In order to use the serial interface on the PortuxG20 we need to enable the level converter first by setting the PC9 pin to high. The level converter needs some time to settle so we have to use the mdelay() function to wait for some time. Unfortunately we have no timers available at board_early_init_f() so we enable the serial output early within board_postclk_init(). Now the U-Boot output looks fine: | U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32) | | CPU: AT91SAM9G20 | Crystal frequency: 18.432 MHz | CPU clock : 396.288 MHz | Master clock : 132.096 MHz | DRAM: 64 MiB | WARNING: Caches not enabled | NAND: 128 MiB | In: serial | Out: serial | Err: serial | Net: macb0 | Hit any key to stop autoboot: 0 Signed-off-by: Markus Hubig <mhubig@imko.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
268 lines
7.9 KiB
C
268 lines
7.9 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2010
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* Achim Ehrlich <aehrlich@taskit.de>
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* taskit GmbH <www.taskit.de>
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*
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* (C) Copyright 2012
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* Markus Hubig <mhubig@imko.de>
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* IMKO GmbH <www.imko.de>
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*
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* Configuation settings for the stamp9g20 CPU module.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* SoC must be defined first, before hardware.h is included.
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* In this case SoC is defined in boards.cfg.
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*/
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#include <asm/hardware.h>
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/*
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* Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
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* program. Since the linker has to swallow that define, we must use a pure
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* hex number here!
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*/
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#define CONFIG_SYS_TEXT_BASE 0x23f00000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
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#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
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/* misc settings */
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#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
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#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
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#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
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#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
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#define CONFIG_BOARD_EARLY_INIT_f /* call board_early_init_f() */
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#define CONFIG_BOARD_POSTCLK_INIT /* call board_postclk_init() */
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#define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */
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/* setting board specific options */
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#ifdef CONFIG_PORTUXG20
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# define CONFIG_MACH_TYPE MACH_TYPE_PORTUXG20
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# define CONFIG_MACB
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#else
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# define CONFIG_MACH_TYPE MACH_TYPE_STAMP9G20
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#endif
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/*
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* SDRAM: 1 bank, 64 MB, base address 0x20000000
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* Already initialized before u-boot gets started.
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE (64 << 20)
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/*
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* Perform a SDRAM Memtest from the start of SDRAM
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* till the beginning of the U-Boot position in RAM.
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*/
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN \
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ROUND(3 * CONFIG_ENV_SIZE + (128 << 10), 0x1000)
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/*
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* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
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* leaving the correct space for initial global data structure above that
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* address while providing maximum stack area below.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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/* NAND flash settings */
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
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/* general purpose I/O */
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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#define CONFIG_AT91_GPIO /* enable the GPIO features */
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#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CONFIG_BAUDRATE 115200
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/* LED configuration */
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#define CONFIG_STATUS_LED
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#define CONFIG_BOARD_SPECIFIC_LED
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/* The LED PINs */
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#define CONFIG_RED_LED AT91_PIN_PC5
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#define CONFIG_GREEN_LED AT91_PIN_PC4
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#define CONFIG_YELLOW_LED AT91_PIN_PC10
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#define STATUS_LED_RED 0
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#define STATUS_LED_GREEN 1
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#define STATUS_LED_YELLOW 2
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/* Red LED */
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#define STATUS_LED_BIT STATUS_LED_RED
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#define STATUS_LED_STATE STATUS_LED_OFF
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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/* Green LED */
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#define STATUS_LED_BIT1 STATUS_LED_GREEN
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#define STATUS_LED_STATE1 STATUS_LED_ON
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#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
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/* Yellow LED */
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#define STATUS_LED_BIT2 STATUS_LED_YELLOW
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#define STATUS_LED_STATE2 STATUS_LED_OFF
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#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
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/* Boot status LED */
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#define STATUS_LED_BOOT STATUS_LED_GREEN
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/*
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* Ethernet configuration
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*
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* PortuxG20 has always ethernet but for Stamp9G20 you
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* can enable it here if your baseboard features ethernet.
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*/
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/* #define CONFIG_MACB */
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#ifdef CONFIG_MACB
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# define CONFIG_RMII /* use reduced MII inteface */
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# define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
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/* BOOTP and DHCP options */
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# define CONFIG_BOOTP_BOOTFILESIZE
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# define CONFIG_BOOTP_BOOTPATH
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# define CONFIG_BOOTP_GATEWAY
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# define CONFIG_BOOTP_HOSTNAME
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# define CONFIG_NFSBOOTCOMMAND \
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"setenv autoload yes; setenv autoboot yes; " \
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"setenv bootargs ${basicargs} ${mtdparts} " \
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"root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
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"dhcp"
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#endif /* CONFIG_MACB */
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/* Enable the watchdog */
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#define CONFIG_AT91SAM9_WATCHDOG
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#define CONFIG_HW_WATCHDOG
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/* USB configuration */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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/* General Boot Parameter */
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTCOMMAND "run flashboot"
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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/*
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* RAM Memory address where to put the
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* Linux Kernel befor starting.
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x22000000
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/*
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* The NAND Flash partitions:
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* ==========================================
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* 0x0000000-0x001ffff -> 128k, bootstrap
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* 0x0020000-0x005ffff -> 256k, u-boot
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* 0x0060000-0x007ffff -> 128k, env1
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* 0x0080000-0x009ffff -> 128k, env2 (backup)
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* 0x0100000-0x06fffff -> 6M, kernel
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* 0x0700000-0x8000000 -> 121M, RootFS
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*/
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET ((128 + 256) << 10)
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#define CONFIG_ENV_OFFSET_REDUND ((128 + 256 + 128) << 10)
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#define CONFIG_ENV_SIZE (128 << 10)
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/*
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* Predefined environment variables.
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* Usefull to define some easy to use boot commands.
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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\
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"basicargs=console=ttyS0,115200\0" \
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\
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"mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro," \
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"256k(uboot)ro,128k(env1)ro," \
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"128k(env2)ro,6M(linux),-(root)rw\0" \
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\
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"flashboot=setenv bootargs ${basicargs} ${mtdparts} " \
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"root=/dev/mtdblock5 rootfstype=jffs2; " \
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"nand read 0x22000000 0x100000 0x600000; " \
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"bootm 22000000\0" \
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\
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"sdboot=setenv bootargs ${basicargs} ${mtdparts} " \
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"root=/dev/mmcblk0p1 rootwait; " \
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"nand read 0x22000000 0x100000 0x600000; " \
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"bootm 22000000"
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/* Command line & features configuration */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_LOADS
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_LED
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#ifdef CONFIG_MACB
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# define CONFIG_CMD_PING
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# define CONFIG_CMD_DHCP
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#else
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# undef CONFIG_CMD_BOOTD
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# undef CONFIG_CMD_NET
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# undef CONFIG_CMD_NFS
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#endif /* CONFIG_MACB */
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#endif /* __CONFIG_H */
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