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https://github.com/brain-hackers/u-boot-brain
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![Andre Przywara](/assets/img/avatar_default.png)
The Allwinner H6 pin controller is not really special, at least not when it comes to normal GPIO operation. Add the H6 compatible strings to the list of recognised strings, to make GPIOs work for H6 boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64 Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
377 lines
8.3 KiB
C
377 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
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*
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* Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
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*
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* (C) Copyright 2007-2011
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Tom Cubie <tangliang@allwinnertech.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <asm/arch/gpio.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <dm/device-internal.h>
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#include <dt-bindings/gpio/gpio.h>
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#define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR
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struct sunxi_gpio_platdata {
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struct sunxi_gpio *regs;
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const char *bank_name; /* Name of bank, e.g. "B" */
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int gpio_count;
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};
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#ifndef CONFIG_DM_GPIO
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static int sunxi_gpio_output(u32 pin, u32 val)
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{
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u32 dat;
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u32 bank = GPIO_BANK(pin);
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u32 num = GPIO_NUM(pin);
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struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
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dat = readl(&pio->dat);
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if (val)
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dat |= 0x1 << num;
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else
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dat &= ~(0x1 << num);
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writel(dat, &pio->dat);
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return 0;
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}
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static int sunxi_gpio_input(u32 pin)
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{
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u32 dat;
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u32 bank = GPIO_BANK(pin);
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u32 num = GPIO_NUM(pin);
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struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
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dat = readl(&pio->dat);
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dat >>= num;
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return dat & 0x1;
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}
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int gpio_request(unsigned gpio, const char *label)
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{
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return 0;
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}
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int gpio_free(unsigned gpio)
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{
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return 0;
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}
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int gpio_direction_input(unsigned gpio)
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{
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sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
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return 0;
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}
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int gpio_direction_output(unsigned gpio, int value)
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{
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sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
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return sunxi_gpio_output(gpio, value);
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}
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int gpio_get_value(unsigned gpio)
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{
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return sunxi_gpio_input(gpio);
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}
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int gpio_set_value(unsigned gpio, int value)
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{
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return sunxi_gpio_output(gpio, value);
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}
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int sunxi_name_to_gpio(const char *name)
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{
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int group = 0;
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int groupsize = 9 * 32;
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long pin;
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char *eptr;
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if (*name == 'P' || *name == 'p')
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name++;
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if (*name >= 'A') {
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group = *name - (*name > 'a' ? 'a' : 'A');
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groupsize = 32;
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name++;
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}
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pin = simple_strtol(name, &eptr, 10);
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if (!*name || *eptr)
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return -1;
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if (pin < 0 || pin > groupsize || group >= 9)
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return -1;
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return group * 32 + pin;
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}
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#endif
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int sunxi_name_to_gpio_bank(const char *name)
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{
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int group = 0;
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if (*name == 'P' || *name == 'p')
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name++;
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if (*name >= 'A') {
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group = *name - (*name > 'a' ? 'a' : 'A');
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return group;
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}
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return -1;
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}
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#ifdef CONFIG_DM_GPIO
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/* TODO(sjg@chromium.org): Remove this function and use device tree */
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int sunxi_name_to_gpio(const char *name)
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{
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unsigned int gpio;
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int ret;
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#if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
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char lookup[8];
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if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) {
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sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
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SUNXI_GPIO_AXP0_VBUS_DETECT);
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name = lookup;
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} else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
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sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
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SUNXI_GPIO_AXP0_VBUS_ENABLE);
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name = lookup;
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}
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#endif
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ret = gpio_lookup_name(name, NULL, NULL, &gpio);
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return ret ? ret : gpio;
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}
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static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
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{
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struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
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sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
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return 0;
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}
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static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
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int value)
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{
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struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
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u32 num = GPIO_NUM(offset);
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sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
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clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
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return 0;
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}
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static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
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{
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struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
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u32 num = GPIO_NUM(offset);
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unsigned dat;
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dat = readl(&plat->regs->dat);
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dat >>= num;
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return dat & 0x1;
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}
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static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
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int value)
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{
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struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
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u32 num = GPIO_NUM(offset);
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clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
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return 0;
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}
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static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
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{
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struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
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int func;
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func = sunxi_gpio_get_cfgbank(plat->regs, offset);
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if (func == SUNXI_GPIO_OUTPUT)
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return GPIOF_OUTPUT;
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else if (func == SUNXI_GPIO_INPUT)
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return GPIOF_INPUT;
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else
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return GPIOF_FUNC;
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}
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static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
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struct ofnode_phandle_args *args)
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{
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int ret;
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ret = device_get_child(dev, args->args[0], &desc->dev);
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if (ret)
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return ret;
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desc->offset = args->args[1];
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desc->flags = args->args[2] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
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return 0;
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}
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static const struct dm_gpio_ops gpio_sunxi_ops = {
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.direction_input = sunxi_gpio_direction_input,
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.direction_output = sunxi_gpio_direction_output,
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.get_value = sunxi_gpio_get_value,
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.set_value = sunxi_gpio_set_value,
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.get_function = sunxi_gpio_get_function,
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.xlate = sunxi_gpio_xlate,
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};
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/**
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* Returns the name of a GPIO bank
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*
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* GPIO banks are named A, B, C, ...
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*
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* @bank: Bank number (0, 1..n-1)
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* @return allocated string containing the name
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*/
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static char *gpio_bank_name(int bank)
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{
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char *name;
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name = malloc(3);
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if (name) {
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name[0] = 'P';
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name[1] = 'A' + bank;
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name[2] = '\0';
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}
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return name;
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}
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static int gpio_sunxi_probe(struct udevice *dev)
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{
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struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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/* Tell the uclass how many GPIOs we have */
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if (plat) {
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uc_priv->gpio_count = plat->gpio_count;
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uc_priv->bank_name = plat->bank_name;
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}
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return 0;
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}
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struct sunxi_gpio_soc_data {
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int start;
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int no_banks;
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};
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/**
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* We have a top-level GPIO device with no actual GPIOs. It has a child
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* device for each Sunxi bank.
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*/
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static int gpio_sunxi_bind(struct udevice *parent)
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{
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struct sunxi_gpio_soc_data *soc_data =
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(struct sunxi_gpio_soc_data *)dev_get_driver_data(parent);
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struct sunxi_gpio_platdata *plat = parent->platdata;
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struct sunxi_gpio_reg *ctlr;
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int bank, ret;
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/* If this is a child device, there is nothing to do here */
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if (plat)
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return 0;
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ctlr = (struct sunxi_gpio_reg *)devfdt_get_addr(parent);
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for (bank = 0; bank < soc_data->no_banks; bank++) {
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struct sunxi_gpio_platdata *plat;
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struct udevice *dev;
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plat = calloc(1, sizeof(*plat));
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if (!plat)
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return -ENOMEM;
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plat->regs = &ctlr->gpio_bank[bank];
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plat->bank_name = gpio_bank_name(soc_data->start + bank);
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plat->gpio_count = SUNXI_GPIOS_PER_BANK;
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ret = device_bind(parent, parent->driver,
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plat->bank_name, plat, -1, &dev);
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if (ret)
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return ret;
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dev_set_of_offset(dev, dev_of_offset(parent));
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}
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return 0;
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}
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static const struct sunxi_gpio_soc_data soc_data_a_all = {
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.start = 0,
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.no_banks = SUNXI_GPIO_BANKS,
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};
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static const struct sunxi_gpio_soc_data soc_data_l_1 = {
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.start = 'L' - 'A',
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.no_banks = 1,
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};
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static const struct sunxi_gpio_soc_data soc_data_l_2 = {
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.start = 'L' - 'A',
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.no_banks = 2,
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};
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static const struct sunxi_gpio_soc_data soc_data_l_3 = {
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.start = 'L' - 'A',
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.no_banks = 3,
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};
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#define ID(_compat_, _soc_data_) \
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{ .compatible = _compat_, .data = (ulong)&soc_data_##_soc_data_ }
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static const struct udevice_id sunxi_gpio_ids[] = {
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ID("allwinner,sun4i-a10-pinctrl", a_all),
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ID("allwinner,sun5i-a10s-pinctrl", a_all),
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ID("allwinner,sun5i-a13-pinctrl", a_all),
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ID("allwinner,sun50i-h5-pinctrl", a_all),
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ID("allwinner,sun6i-a31-pinctrl", a_all),
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ID("allwinner,sun6i-a31s-pinctrl", a_all),
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ID("allwinner,sun7i-a20-pinctrl", a_all),
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ID("allwinner,sun8i-a23-pinctrl", a_all),
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ID("allwinner,sun8i-a33-pinctrl", a_all),
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ID("allwinner,sun8i-a83t-pinctrl", a_all),
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ID("allwinner,sun8i-h3-pinctrl", a_all),
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ID("allwinner,sun8i-r40-pinctrl", a_all),
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ID("allwinner,sun8i-v3s-pinctrl", a_all),
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ID("allwinner,sun9i-a80-pinctrl", a_all),
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ID("allwinner,sun50i-a64-pinctrl", a_all),
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ID("allwinner,sun50i-h6-pinctrl", a_all),
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ID("allwinner,sun6i-a31-r-pinctrl", l_2),
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ID("allwinner,sun8i-a23-r-pinctrl", l_1),
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ID("allwinner,sun8i-a83t-r-pinctrl", l_1),
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ID("allwinner,sun8i-h3-r-pinctrl", l_1),
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ID("allwinner,sun9i-a80-r-pinctrl", l_3),
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ID("allwinner,sun50i-a64-r-pinctrl", l_1),
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ID("allwinner,sun50i-h6-r-pinctrl", l_2),
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{ }
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};
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U_BOOT_DRIVER(gpio_sunxi) = {
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.name = "gpio_sunxi",
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.id = UCLASS_GPIO,
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.ops = &gpio_sunxi_ops,
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.of_match = sunxi_gpio_ids,
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.bind = gpio_sunxi_bind,
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.probe = gpio_sunxi_probe,
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};
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#endif
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