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https://github.com/brain-hackers/u-boot-brain
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8ed02bc2d9
The sunxi DRAM setup code needs an sdelay() implementation, which wasn't defined for armv8 so far. Shamelessly copy the armv7 version and adjust it to work in AArch64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
80 lines
1.7 KiB
C
80 lines
1.7 KiB
C
/*
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* (C) Copyright 2008 Texas Insturments
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/system.h>
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#include <asm/secure.h>
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#include <linux/compiler.h>
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/*
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* sdelay() - simple spin loop.
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*
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* Will delay execution by roughly (@loops * 2) cycles.
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* This is necessary to be used before timers are accessible.
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*
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* A value of "0" will results in 2^64 loops.
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*/
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void sdelay(unsigned long loops)
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{
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__asm__ volatile ("1:\n" "subs %0, %0, #1\n"
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"b.ne 1b" : "=r" (loops) : "0"(loops) : "cc");
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}
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int cleanup_before_linux(void)
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{
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/*
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* this function is called just before we call linux
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* it prepares the processor for linux
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*
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* disable interrupt and turn off caches etc ...
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*/
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disable_interrupts();
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/*
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* Turn off I-cache and invalidate it
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*/
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icache_disable();
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invalidate_icache_all();
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/*
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* turn off D-cache
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* dcache_disable() in turn flushes the d-cache and disables MMU
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*/
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dcache_disable();
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invalidate_dcache_all();
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return 0;
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}
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#ifdef CONFIG_ARMV8_PSCI
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static void relocate_secure_section(void)
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{
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#ifdef CONFIG_ARMV8_SECURE_BASE
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size_t sz = __secure_end - __secure_start;
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memcpy((void *)CONFIG_ARMV8_SECURE_BASE, __secure_start, sz);
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flush_dcache_range(CONFIG_ARMV8_SECURE_BASE,
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CONFIG_ARMV8_SECURE_BASE + sz + 1);
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invalidate_icache_all();
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#endif
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}
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void armv8_setup_psci(void)
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{
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relocate_secure_section();
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secure_ram_addr(psci_setup_vectors)();
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secure_ram_addr(psci_arch_init)();
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}
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#endif
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