mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
134 lines
2.7 KiB
C
134 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2013 Gateworks Corporation
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*/
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#ifndef _VENTANA_EEPROM_
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#define _VENTANA_EEPROM_
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struct ventana_board_info {
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u8 mac0[6]; /* 0x00: MAC1 */
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u8 mac1[6]; /* 0x06: MAC2 */
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u8 res0[12]; /* 0x0C: reserved */
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u32 serial; /* 0x18: Serial Number (read only) */
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u8 res1[4]; /* 0x1C: reserved */
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u8 mfgdate[4]; /* 0x20: MFG date (read only) */
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u8 res2[7]; /* 0x24 */
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/* sdram config */
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u8 sdram_size; /* 0x2B: (16 << n) MB */
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u8 sdram_speed; /* 0x2C: (33.333 * n) MHz */
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u8 sdram_width; /* 0x2D: (8 << n) bit */
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/* cpu config */
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u8 cpu_speed; /* 0x2E: (33.333 * n) MHz */
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u8 cpu_type; /* 0x2F: 7=imx6q, 8=imx6dl */
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u8 model[16]; /* 0x30: model string */
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/* FLASH config */
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u8 nand_flash_size; /* 0x40: (8 << (n-1)) MB */
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u8 spi_flash_size; /* 0x41: (4 << (n-1)) MB */
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/* Config1: SoC Peripherals */
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u8 config[8]; /* 0x42: loading options */
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u8 res3[4]; /* 0x4A */
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u8 chksum[2]; /* 0x4E */
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};
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/* config bits */
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enum {
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EECONFIG_ETH0,
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EECONFIG_ETH1,
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EECONFIG_HDMI_OUT,
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EECONFIG_SATA,
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EECONFIG_PCIE,
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EECONFIG_SSI0,
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EECONFIG_SSI1,
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EECONFIG_LCD,
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EECONFIG_LVDS0,
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EECONFIG_LVDS1,
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EECONFIG_USB0,
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EECONFIG_USB1,
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EECONFIG_SD0,
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EECONFIG_SD1,
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EECONFIG_SD2,
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EECONFIG_SD3,
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EECONFIG_UART0,
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EECONFIG_UART1,
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EECONFIG_UART2,
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EECONFIG_UART3,
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EECONFIG_UART4,
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EECONFIG_IPU0,
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EECONFIG_IPU1,
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EECONFIG_FLEXCAN,
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EECONFIG_MIPI_DSI,
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EECONFIG_MIPI_CSI,
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EECONFIG_TZASC0,
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EECONFIG_TZASC1,
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EECONFIG_I2C0,
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EECONFIG_I2C1,
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EECONFIG_I2C2,
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EECONFIG_VPU,
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EECONFIG_CSI0,
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EECONFIG_CSI1,
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EECONFIG_CAAM,
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EECONFIG_MEZZ,
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EECONFIG_RES1,
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EECONFIG_RES2,
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EECONFIG_RES3,
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EECONFIG_RES4,
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EECONFIG_ESPCI0,
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EECONFIG_ESPCI1,
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EECONFIG_ESPCI2,
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EECONFIG_ESPCI3,
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EECONFIG_ESPCI4,
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EECONFIG_ESPCI5,
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EECONFIG_RES5,
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EECONFIG_RES6,
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EECONFIG_GPS,
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EECONFIG_SPIFL0,
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EECONFIG_SPIFL1,
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EECONFIG_GSPBATT,
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EECONFIG_HDMI_IN,
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EECONFIG_VID_OUT,
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EECONFIG_VID_IN,
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EECONFIG_NAND,
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EECONFIG_RES8,
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EECONFIG_RES9,
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EECONFIG_RES10,
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EECONFIG_RES11,
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EECONFIG_RES12,
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EECONFIG_RES13,
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EECONFIG_RES14,
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EECONFIG_RES15,
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};
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enum {
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GW54proto, /* original GW5400-A prototype */
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GW51xx,
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GW52xx,
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GW53xx,
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GW54xx,
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GW551x,
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GW552x,
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GW553x,
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GW560x,
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GW5903,
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GW5904,
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GW_UNKNOWN,
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GW_BADCRC,
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};
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/* config items */
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struct ventana_eeprom_config {
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const char *name; /* name of item */
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const char *dtalias; /* name of dt node to remove if not set */
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int bit; /* bit within config */
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};
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extern struct ventana_eeprom_config econfig[];
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extern struct ventana_board_info ventana_info;
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int read_eeprom(int bus, struct ventana_board_info *);
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#endif
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