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![Philipp Tomsich](/assets/img/avatar_default.png)
To fully support DM timer in SPL and TPL, we need a few things cleaned up and normalised: - inclusion of the uclass and drivers should be an all-or-nothing decision for each stage and under control of $(SPL_TPL_)TIMER instead of having the two-level configuration with TIMER and $(SPL_TPL_)TIMER_SUPPORT - when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can not be compiled in This normalises configuration to $(SPL_TPL_)TIMER and moves the config options to drivers/timer/Kconfig (and cleans up the collateral damage to some defconfigs that had SPL_TIMER_SUPPORT enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
34 lines
814 B
Makefile
34 lines
814 B
Makefile
#
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# (C) Copyright 2000-2003
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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extra-y := start.o
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obj-y += cpu.o
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ifndef CONFIG_$(SPL_TPL_)TIMER
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obj-y += generic_timer.o
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endif
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obj-y += cache_v8.o
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obj-y += exceptions.o
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obj-y += cache.o
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obj-y += tlb.o
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obj-y += transition.o
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obj-y += fwcall.o
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obj-y += cpu-dt.o
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obj-$(CONFIG_ARM_SMCCC) += smccc-call.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
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endif
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obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
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obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
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obj-$(CONFIG_S32V234) += s32v234/
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obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/
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obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
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obj-$(CONFIG_ARMV8_PSCI) += psci.o
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obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o
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