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https://github.com/brain-hackers/u-boot-brain
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8e4ab1d582
While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit line of devices, there could be other boards using the same chip, so a common configuration file is being added (exynos5420.h) as well as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi). The peach board as declared in boards.cfg is a copy of smdk5420 declaration. The configuration files are similar, but define different default device trees, console serial ports and prompts. The device tree files for smdk5420 and peach-pit inherit from the same common file. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
152 lines
2.8 KiB
Plaintext
152 lines
2.8 KiB
Plaintext
/*
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* (C) Copyright 2013 SAMSUNG Electronics
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* SAMSUNG EXYNOS5420 SoC device tree source
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/include/ "exynos5.dtsi"
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/ {
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config {
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machine-arch-id = <4151>;
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};
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aliases {
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i2c0 = "/i2c@12c60000";
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i2c1 = "/i2c@12c70000";
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i2c2 = "/i2c@12c80000";
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i2c3 = "/i2c@12c90000";
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i2c4 = "/i2c@12ca0000";
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i2c5 = "/i2c@12cb0000";
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i2c6 = "/i2c@12cc0000";
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i2c7 = "/i2c@12cd0000";
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i2c8 = "/i2c@12e00000";
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i2c9 = "/i2c@12e10000";
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i2c10 = "/i2c@12e20000";
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spi0 = "/spi@12d20000";
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spi1 = "/spi@12d30000";
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spi2 = "/spi@12d40000";
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spi3 = "/spi@131a0000";
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spi4 = "/spi@131b0000";
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mmc0 = "/mmc@12200000";
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mmc1 = "/mmc@12210000";
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mmc2 = "/mmc@12220000";
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xhci0 = "/xhci@12000000";
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xhci1 = "/xhci@12400000";
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};
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i2c@12ca0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CA0000 0x100>;
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interrupts = <0 60 0>;
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};
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i2c@12cb0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CB0000 0x100>;
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interrupts = <0 61 0>;
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};
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i2c@12cc0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CC0000 0x100>;
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interrupts = <0 62 0>;
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};
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i2c@12cd0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12CD0000 0x100>;
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interrupts = <0 63 0>;
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};
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i2c@12e00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12E00000 0x100>;
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interrupts = <0 87 0>;
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};
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i2c@12e10000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12E10000 0x100>;
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interrupts = <0 88 0>;
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};
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i2c@12e20000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12E20000 0x100>;
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interrupts = <0 203 0>;
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};
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mmc@12200000 {
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samsung,bus-width = <8>;
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samsung,timing = <1 3 3>;
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samsung,removable = <0>;
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samsung,pre-init;
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};
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mmc@12210000 {
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status = "disabled";
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};
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mmc@12220000 {
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samsung,bus-width = <4>;
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samsung,timing = <1 2 3>;
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samsung,removable = <1>;
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};
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mmc@12230000 {
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status = "disabled";
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};
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fimd@14400000 {
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/* sysmmu is not used in U-Boot */
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samsung,disable-sysmmu;
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};
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dp@145b0000 {
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samsung,lt-status = <0>;
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samsung,master-mode = <0>;
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samsung,bist-mode = <0>;
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samsung,bist-pattern = <0>;
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samsung,h-sync-polarity = <0>;
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samsung,v-sync-polarity = <0>;
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samsung,interlaced = <0>;
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samsung,color-space = <0>;
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samsung,dynamic-range = <0>;
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samsung,ycbcr-coeff = <0>;
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samsung,color-depth = <1>;
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};
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dmc {
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mem-type = "ddr3";
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};
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xhci1: xhci@12400000 {
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compatible = "samsung,exynos5250-xhci";
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reg = <0x12400000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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phy {
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compatible = "samsung,exynos5250-usb3-phy";
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reg = <0x12500000 0x100>;
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};
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};
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};
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