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https://github.com/brain-hackers/u-boot-brain
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8e4ab1d582
While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit line of devices, there could be other boards using the same chip, so a common configuration file is being added (exynos5420.h) as well as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi). The peach board as declared in boards.cfg is a copy of smdk5420 declaration. The configuration files are similar, but define different default device trees, console serial ports and prompts. The device tree files for smdk5420 and peach-pit inherit from the same common file. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
45 lines
1017 B
Makefile
45 lines
1017 B
Makefile
dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
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exynos4210-universal_c210.dtb \
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exynos4210-trats.dtb \
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exynos4412-trats2.dtb
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dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
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exynos5250-snow.dtb \
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exynos5250-smdk5250.dtb \
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exynos5420-smdk5420.dtb \
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exynos5420-peach-pit.dtb
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dtb-$(CONFIG_MX6) += imx6q-sabreauto.dtb
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dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
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tegra20-medcom-wide.dtb \
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tegra20-paz00.dtb \
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tegra20-plutux.dtb \
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tegra20-seaboard.dtb \
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tegra20-tec.dtb \
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tegra20-trimslice.dtb \
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tegra20-ventana.dtb \
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tegra20-whistler.dtb \
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tegra20-colibri_t20_iris.dtb \
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tegra30-beaver.dtb \
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tegra30-cardhu.dtb \
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tegra30-tec-ng.dtb \
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tegra114-dalmore.dtb \
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tegra124-jetson-tk1.dtb \
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tegra124-venice2.dtb
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dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
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zynq-zc706.dtb \
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zynq-zed.dtb \
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zynq-microzed.dtb \
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zynq-zc770-xm010.dtb \
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zynq-zc770-xm012.dtb \
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zynq-zc770-xm013.dtb
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targets += $(dtb-y)
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DTC_FLAGS += -R 4 -p 0x1000
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PHONY += dtbs
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dtbs: $(addprefix $(obj)/, $(dtb-y))
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@:
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clean-files := *.dtb
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