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![Nobuhiro Iwamatsu](/assets/img/avatar_default.png)
In current source code, when the device number of PCI is 0, process PCI bridge without fail. However, when the device number is 0, it is not PCI always bridge. There are times when device of PCI allocates. When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when use this patch. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Stefan Roese <sr@denx.de>
534 lines
13 KiB
C
534 lines
13 KiB
C
/*
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* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Andreas Heppel <aheppel@sysgo.de>
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*
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* (C) Copyright 2002, 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* PCI routines
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*/
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#include <common.h>
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#ifdef CONFIG_PCI
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <pci.h>
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#define PCI_HOSE_OP(rw, size, type) \
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int pci_hose_##rw##_config_##size(struct pci_controller *hose, \
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pci_dev_t dev, \
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int offset, type value) \
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{ \
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return hose->rw##_##size(hose, dev, offset, value); \
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}
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PCI_HOSE_OP(read, byte, u8 *)
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PCI_HOSE_OP(read, word, u16 *)
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PCI_HOSE_OP(read, dword, u32 *)
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PCI_HOSE_OP(write, byte, u8)
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PCI_HOSE_OP(write, word, u16)
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PCI_HOSE_OP(write, dword, u32)
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#ifndef CONFIG_IXP425
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#define PCI_OP(rw, size, type, error_code) \
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int pci_##rw##_config_##size(pci_dev_t dev, int offset, type value) \
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{ \
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struct pci_controller *hose = pci_bus_to_hose(PCI_BUS(dev)); \
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\
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if (!hose) \
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{ \
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error_code; \
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return -1; \
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} \
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\
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return pci_hose_##rw##_config_##size(hose, dev, offset, value); \
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}
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PCI_OP(read, byte, u8 *, *value = 0xff)
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PCI_OP(read, word, u16 *, *value = 0xffff)
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PCI_OP(read, dword, u32 *, *value = 0xffffffff)
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PCI_OP(write, byte, u8, )
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PCI_OP(write, word, u16, )
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PCI_OP(write, dword, u32, )
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#endif /* CONFIG_IXP425 */
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#define PCI_READ_VIA_DWORD_OP(size, type, off_mask) \
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int pci_hose_read_config_##size##_via_dword(struct pci_controller *hose,\
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pci_dev_t dev, \
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int offset, type val) \
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{ \
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u32 val32; \
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\
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if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0) { \
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*val = -1; \
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return -1; \
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} \
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\
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*val = (val32 >> ((offset & (int)off_mask) * 8)); \
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\
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return 0; \
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}
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#define PCI_WRITE_VIA_DWORD_OP(size, type, off_mask, val_mask) \
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int pci_hose_write_config_##size##_via_dword(struct pci_controller *hose,\
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pci_dev_t dev, \
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int offset, type val) \
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{ \
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u32 val32, mask, ldata, shift; \
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\
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if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0)\
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return -1; \
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\
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shift = ((offset & (int)off_mask) * 8); \
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ldata = (((unsigned long)val) & val_mask) << shift; \
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mask = val_mask << shift; \
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val32 = (val32 & ~mask) | ldata; \
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\
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if (pci_hose_write_config_dword(hose, dev, offset & 0xfc, val32) < 0)\
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return -1; \
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\
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return 0; \
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}
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PCI_READ_VIA_DWORD_OP(byte, u8 *, 0x03)
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PCI_READ_VIA_DWORD_OP(word, u16 *, 0x02)
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PCI_WRITE_VIA_DWORD_OP(byte, u8, 0x03, 0x000000ff)
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PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff)
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/*
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*
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*/
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static struct pci_controller* hose_head = NULL;
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void pci_register_hose(struct pci_controller* hose)
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{
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struct pci_controller **phose = &hose_head;
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while(*phose)
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phose = &(*phose)->next;
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hose->next = NULL;
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*phose = hose;
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}
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struct pci_controller *pci_bus_to_hose (int bus)
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{
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struct pci_controller *hose;
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for (hose = hose_head; hose; hose = hose->next)
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if (bus >= hose->first_busno && bus <= hose->last_busno)
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return hose;
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printf("pci_bus_to_hose() failed\n");
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return NULL;
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}
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#ifndef CONFIG_IXP425
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pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
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{
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struct pci_controller * hose;
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u16 vendor, device;
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u8 header_type;
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pci_dev_t bdf;
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int i, bus, found_multi = 0;
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for (hose = hose_head; hose; hose = hose->next)
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{
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#ifdef CFG_SCSI_SCAN_BUS_REVERSE
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for (bus = hose->last_busno; bus >= hose->first_busno; bus--)
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#else
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for (bus = hose->first_busno; bus <= hose->last_busno; bus++)
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#endif
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for (bdf = PCI_BDF(bus,0,0);
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#if defined(CONFIG_ELPPC) || defined(CONFIG_PPMC7XX)
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bdf < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
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#else
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bdf < PCI_BDF(bus+1,0,0);
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#endif
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bdf += PCI_BDF(0,0,1))
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{
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if (!PCI_FUNC(bdf)) {
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pci_read_config_byte(bdf,
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PCI_HEADER_TYPE,
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&header_type);
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found_multi = header_type & 0x80;
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} else {
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if (!found_multi)
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continue;
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}
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pci_read_config_word(bdf,
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PCI_VENDOR_ID,
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&vendor);
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pci_read_config_word(bdf,
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PCI_DEVICE_ID,
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&device);
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for (i=0; ids[i].vendor != 0; i++)
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if (vendor == ids[i].vendor &&
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device == ids[i].device)
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{
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if (index <= 0)
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return bdf;
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index--;
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}
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}
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}
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return (-1);
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}
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#endif /* CONFIG_IXP425 */
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pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
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{
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static struct pci_device_id ids[2] = {{}, {0, 0}};
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ids[0].vendor = vendor;
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ids[0].device = device;
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return pci_find_devices(ids, index);
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}
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/*
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*
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*/
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unsigned long pci_hose_phys_to_bus (struct pci_controller *hose,
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unsigned long phys_addr,
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unsigned long flags)
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{
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struct pci_region *res;
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unsigned long bus_addr;
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int i;
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if (!hose) {
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printf ("pci_hose_phys_to_bus: %s\n", "invalid hose");
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goto Done;
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}
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for (i = 0; i < hose->region_count; i++) {
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res = &hose->regions[i];
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if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
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continue;
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bus_addr = phys_addr - res->phys_start + res->bus_start;
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if (bus_addr >= res->bus_start &&
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bus_addr < res->bus_start + res->size) {
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return bus_addr;
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}
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}
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printf ("pci_hose_phys_to_bus: %s\n", "invalid physical address");
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Done:
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return 0;
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}
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unsigned long pci_hose_bus_to_phys(struct pci_controller* hose,
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unsigned long bus_addr,
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unsigned long flags)
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{
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struct pci_region *res;
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int i;
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if (!hose) {
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printf ("pci_hose_bus_to_phys: %s\n", "invalid hose");
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goto Done;
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}
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for (i = 0; i < hose->region_count; i++) {
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res = &hose->regions[i];
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if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
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continue;
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if (bus_addr >= res->bus_start &&
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bus_addr < res->bus_start + res->size) {
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return bus_addr - res->bus_start + res->phys_start;
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}
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}
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printf ("pci_hose_bus_to_phys: %s\n", "invalid physical address");
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Done:
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return 0;
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}
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/*
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*
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*/
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int pci_hose_config_device(struct pci_controller *hose,
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pci_dev_t dev,
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unsigned long io,
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unsigned long mem,
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unsigned long command)
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{
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unsigned int bar_response, bar_size, bar_value, old_command;
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unsigned char pin;
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int bar, found_mem64;
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debug ("PCI Config: I/O=0x%lx, Memory=0x%lx, Command=0x%lx\n",
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io, mem, command);
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pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
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for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_5; bar += 4) {
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pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
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pci_hose_read_config_dword (hose, dev, bar, &bar_response);
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if (!bar_response)
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continue;
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found_mem64 = 0;
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/* Check the BAR type and set our address mask */
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if (bar_response & PCI_BASE_ADDRESS_SPACE) {
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bar_size = ~(bar_response & PCI_BASE_ADDRESS_IO_MASK) + 1;
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/* round up region base address to a multiple of size */
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io = ((io - 1) | (bar_size - 1)) + 1;
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bar_value = io;
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/* compute new region base address */
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io = io + bar_size;
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} else {
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if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
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PCI_BASE_ADDRESS_MEM_TYPE_64)
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found_mem64 = 1;
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bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1;
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/* round up region base address to multiple of size */
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mem = ((mem - 1) | (bar_size - 1)) + 1;
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bar_value = mem;
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/* compute new region base address */
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mem = mem + bar_size;
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}
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/* Write it out and update our limit */
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pci_hose_write_config_dword (hose, dev, bar, bar_value);
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if (found_mem64) {
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bar += 4;
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pci_hose_write_config_dword (hose, dev, bar, 0x00000000);
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}
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}
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/* Configure Cache Line Size Register */
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pci_hose_write_config_byte (hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
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/* Configure Latency Timer */
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pci_hose_write_config_byte (hose, dev, PCI_LATENCY_TIMER, 0x80);
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/* Disable interrupt line, if device says it wants to use interrupts */
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pci_hose_read_config_byte (hose, dev, PCI_INTERRUPT_PIN, &pin);
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if (pin != 0) {
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pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE, 0xff);
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}
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pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &old_command);
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pci_hose_write_config_dword (hose, dev, PCI_COMMAND,
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(old_command & 0xffff0000) | command);
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return 0;
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}
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/*
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*
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*/
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struct pci_config_table *pci_find_config(struct pci_controller *hose,
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unsigned short class,
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unsigned int vendor,
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unsigned int device,
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unsigned int bus,
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unsigned int dev,
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unsigned int func)
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{
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struct pci_config_table *table;
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for (table = hose->config_table; table && table->vendor; table++) {
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if ((table->vendor == PCI_ANY_ID || table->vendor == vendor) &&
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(table->device == PCI_ANY_ID || table->device == device) &&
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(table->class == PCI_ANY_ID || table->class == class) &&
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(table->bus == PCI_ANY_ID || table->bus == bus) &&
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(table->dev == PCI_ANY_ID || table->dev == dev) &&
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(table->func == PCI_ANY_ID || table->func == func)) {
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return table;
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}
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}
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return NULL;
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}
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void pci_cfgfunc_config_device(struct pci_controller *hose,
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pci_dev_t dev,
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struct pci_config_table *entry)
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{
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pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1], entry->priv[2]);
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}
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void pci_cfgfunc_do_nothing(struct pci_controller *hose,
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pci_dev_t dev, struct pci_config_table *entry)
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{
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}
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/*
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*
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*/
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/* HJF: Changed this to return int. I think this is required
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* to get the correct result when scanning bridges
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*/
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extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
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extern void pciauto_config_init(struct pci_controller *hose);
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int pci_hose_scan_bus(struct pci_controller *hose, int bus)
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{
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unsigned int sub_bus, found_multi=0;
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unsigned short vendor, device, class;
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unsigned char header_type;
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struct pci_config_table *cfg;
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pci_dev_t dev;
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sub_bus = bus;
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for (dev = PCI_BDF(bus,0,0);
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dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
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dev += PCI_BDF(0,0,1))
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{
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/* Bus 0 is not necessarily PCI bridge. */
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#if defined(CONFIG_PCI_SKIP_HOST_BRIDGE)
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/* Skip our host bridge */
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if ( dev == PCI_BDF(hose->first_busno,0,0) ) {
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#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE) /* don't skip host bridge */
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/*
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* Only skip hostbridge configuration if "pciconfighost" is not set
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*/
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if (getenv("pciconfighost") == NULL) {
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continue; /* Skip our host bridge */
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}
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#else /* CONFIG_PCI_CONFIG_HOST_BRIDGE */
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continue; /* Skip our host bridge */
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#endif /* CONFIG_PCI_CONFIG_HOST_BRIDGE */
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}
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#endif /* CONFIG_PCI_SKIP_HOST_BRIDGE */
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if (PCI_FUNC(dev) && !found_multi)
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continue;
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pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
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pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
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if (vendor != 0xffff && vendor != 0x0000) {
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if (!PCI_FUNC(dev))
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found_multi = header_type & 0x80;
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debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n",
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PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) );
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pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device);
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pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
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cfg = pci_find_config(hose, class, vendor, device,
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PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
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if (cfg) {
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cfg->config_device(hose, dev, cfg);
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sub_bus = max(sub_bus, hose->current_busno);
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#ifdef CONFIG_PCI_PNP
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} else {
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int n = pciauto_config_device(hose, dev);
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sub_bus = max(sub_bus, n);
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#endif
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}
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if (hose->fixup_irq)
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hose->fixup_irq(hose, dev);
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#ifdef CONFIG_PCI_SCAN_SHOW
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#if defined(CONFIG_PCI_SKIP_HOST_BRIDGE)
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/* Skip our host bridge */
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if ( dev != PCI_BDF(hose->first_busno,0,0) )
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#endif
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{
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unsigned char int_line;
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pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_LINE,
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&int_line);
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printf(" %02x %02x %04x %04x %04x %02x\n",
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PCI_BUS(dev), PCI_DEV(dev), vendor, device, class,
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int_line);
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}
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#endif
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}
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}
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return sub_bus;
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}
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int pci_hose_scan(struct pci_controller *hose)
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{
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/* Start scan at current_busno.
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|
* PCIe will start scan at first_busno+1.
|
|
*/
|
|
/* For legacy support, ensure current>=first */
|
|
if (hose->first_busno > hose->current_busno)
|
|
hose->current_busno = hose->first_busno;
|
|
#ifdef CONFIG_PCI_PNP
|
|
pciauto_config_init(hose);
|
|
#endif
|
|
return pci_hose_scan_bus(hose, hose->current_busno);
|
|
}
|
|
|
|
void pci_init(void)
|
|
{
|
|
#if defined(CONFIG_PCI_BOOTDELAY)
|
|
char *s;
|
|
int i;
|
|
|
|
/* wait "pcidelay" ms (if defined)... */
|
|
s = getenv ("pcidelay");
|
|
if (s) {
|
|
int val = simple_strtoul (s, NULL, 10);
|
|
for (i=0; i<val; i++)
|
|
udelay (1000);
|
|
}
|
|
#endif /* CONFIG_PCI_BOOTDELAY */
|
|
|
|
/* now call board specific pci_init()... */
|
|
pci_init_board();
|
|
}
|
|
|
|
#endif /* CONFIG_PCI */
|