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41eee945ce
An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calculate offset. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 lines
669 B
Makefile
17 lines
669 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2017 Rockchip Electronics Co., Ltd
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obj-y += pinctrl-rockchip-core.o
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obj-$(CONFIG_ROCKCHIP_PX30) += pinctrl-px30.o
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obj-$(CONFIG_ROCKCHIP_RK3036) += pinctrl-rk3036.o
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obj-$(CONFIG_ROCKCHIP_RK3128) += pinctrl-rk3128.o
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obj-$(CONFIG_ROCKCHIP_RK3188) += pinctrl-rk3188.o
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obj-$(CONFIG_ROCKCHIP_RK322X) += pinctrl-rk322x.o
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obj-$(CONFIG_ROCKCHIP_RK3288) += pinctrl-rk3288.o
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obj-$(CONFIG_ROCKCHIP_RK3308) += pinctrl-rk3308.o
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obj-$(CONFIG_ROCKCHIP_RK3328) += pinctrl-rk3328.o
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obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o
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obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o
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obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
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