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![Chen-Yu Tsai](/assets/img/avatar_default.png)
VBUS drive is supported on AXP221 and later PMICs. Rework the macros so we can support this on later PMICs without too much work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
181 lines
3.8 KiB
C
181 lines
3.8 KiB
C
/*
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* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
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*
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* X-Powers AXP Power Management ICs gpio driver
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pmic_bus.h>
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#include <asm/gpio.h>
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#include <axp_pmic.h>
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#include <dm.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include <dm/root.h>
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#include <errno.h>
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static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val);
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static u8 axp_get_gpio_ctrl_reg(unsigned pin)
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{
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switch (pin) {
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case 0: return AXP_GPIO0_CTRL;
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case 1: return AXP_GPIO1_CTRL;
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#ifdef AXP_GPIO2_CTRL
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case 2: return AXP_GPIO2_CTRL;
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#endif
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#ifdef AXP_GPIO3_CTRL
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case 3: return AXP_GPIO3_CTRL;
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#endif
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}
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return 0;
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}
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static int axp_gpio_direction_input(struct udevice *dev, unsigned pin)
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{
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u8 reg;
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switch (pin) {
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#ifndef CONFIG_AXP152_POWER /* NA on axp152 */
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case SUNXI_GPIO_AXP0_VBUS_DETECT:
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return 0;
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#endif
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default:
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reg = axp_get_gpio_ctrl_reg(pin);
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if (reg == 0)
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return -EINVAL;
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return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT);
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}
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}
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static int axp_gpio_direction_output(struct udevice *dev, unsigned pin,
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int val)
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{
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__maybe_unused int ret;
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u8 reg;
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switch (pin) {
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#ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC
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/* Only available on later PMICs */
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case SUNXI_GPIO_AXP0_VBUS_ENABLE:
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ret = pmic_bus_clrbits(AXP_MISC_CTRL,
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AXP_MISC_CTRL_N_VBUSEN_FUNC);
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if (ret)
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return ret;
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return axp_gpio_set_value(dev, pin, val);
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#endif
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default:
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reg = axp_get_gpio_ctrl_reg(pin);
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if (reg == 0)
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return -EINVAL;
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return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH :
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AXP_GPIO_CTRL_OUTPUT_LOW);
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}
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}
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static int axp_gpio_get_value(struct udevice *dev, unsigned pin)
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{
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u8 reg, val, mask;
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int ret;
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switch (pin) {
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#ifndef CONFIG_AXP152_POWER /* NA on axp152 */
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case SUNXI_GPIO_AXP0_VBUS_DETECT:
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ret = pmic_bus_read(AXP_POWER_STATUS, &val);
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mask = AXP_POWER_STATUS_VBUS_PRESENT;
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break;
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#endif
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#ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC
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/* Only available on later PMICs */
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case SUNXI_GPIO_AXP0_VBUS_ENABLE:
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ret = pmic_bus_read(AXP_VBUS_IPSOUT, &val);
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mask = AXP_VBUS_IPSOUT_DRIVEBUS;
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break;
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#endif
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default:
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reg = axp_get_gpio_ctrl_reg(pin);
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if (reg == 0)
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return -EINVAL;
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ret = pmic_bus_read(AXP_GPIO_STATE, &val);
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mask = 1 << (pin + AXP_GPIO_STATE_OFFSET);
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}
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if (ret)
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return ret;
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return (val & mask) ? 1 : 0;
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}
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static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val)
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{
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u8 reg;
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switch (pin) {
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#ifdef AXP_MISC_CTRL_N_VBUSEN_FUNC
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/* Only available on later PMICs */
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case SUNXI_GPIO_AXP0_VBUS_ENABLE:
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if (val)
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return pmic_bus_setbits(AXP_VBUS_IPSOUT,
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AXP_VBUS_IPSOUT_DRIVEBUS);
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else
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return pmic_bus_clrbits(AXP_VBUS_IPSOUT,
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AXP_VBUS_IPSOUT_DRIVEBUS);
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#endif
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default:
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reg = axp_get_gpio_ctrl_reg(pin);
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if (reg == 0)
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return -EINVAL;
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return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH :
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AXP_GPIO_CTRL_OUTPUT_LOW);
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}
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}
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static const struct dm_gpio_ops gpio_axp_ops = {
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.direction_input = axp_gpio_direction_input,
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.direction_output = axp_gpio_direction_output,
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.get_value = axp_gpio_get_value,
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.set_value = axp_gpio_set_value,
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};
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static int gpio_axp_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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/* Tell the uclass how many GPIOs we have */
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uc_priv->bank_name = strdup(SUNXI_GPIO_AXP0_PREFIX);
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uc_priv->gpio_count = SUNXI_GPIO_AXP0_GPIO_COUNT;
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return 0;
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}
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U_BOOT_DRIVER(gpio_axp) = {
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.name = "gpio_axp",
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.id = UCLASS_GPIO,
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.ops = &gpio_axp_ops,
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.probe = gpio_axp_probe,
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};
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int axp_gpio_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = pmic_bus_init();
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if (ret)
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return ret;
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/* There is no devicetree support for the axp yet, so bind directly */
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ret = device_bind_driver(dm_root(), "gpio_axp", "AXP-gpio", &dev);
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if (ret)
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return ret;
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return 0;
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}
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