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https://github.com/brain-hackers/u-boot-brain
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8d6e18df60
The tpr3 (timing skew) parameter is used in all supported versions of
the sunxi DRAM controller, but it was only enabled for sun4i in
47e3501a76.
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
39 lines
771 B
C
39 lines
771 B
C
/* DRAM parameters for auto dram configuration on sun5i and sun7i */
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#include <common.h>
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#include <asm/arch/dram.h>
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static struct dram_para dram_para = {
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.clock = CONFIG_DRAM_CLK,
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.mbus_clock = CONFIG_DRAM_MBUS_CLK,
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.type = 3,
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.rank_num = 1,
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.density = 0,
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.io_width = 0,
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.bus_width = 0,
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.zq = CONFIG_DRAM_ZQ,
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.odt_en = CONFIG_DRAM_ODT_EN,
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.size = 0,
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#ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC
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.cas = 9,
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.tpr0 = 0x42d899b7,
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.tpr1 = 0xa090,
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.tpr2 = 0x22a00,
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.emr2 = 0x10,
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#else
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# include "dram_timings_sun4i.h"
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.active_windowing = 1,
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#endif
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.tpr3 = CONFIG_DRAM_TPR3,
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.tpr4 = 0,
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.tpr5 = 0,
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.emr1 = CONFIG_DRAM_EMR1,
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.emr3 = 0,
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.dqs_gating_delay = CONFIG_DRAM_DQS_GATING_DELAY,
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};
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unsigned long sunxi_dram_init(void)
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{
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return dramc_init(&dram_para);
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}
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