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https://github.com/brain-hackers/u-boot-brain
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8d59d7f63b
Read information about memory from DT. This patch simplify life with synchronization between DT and board files. dram_init() only needs maximum RAM size below 4GB that's why please sort banks in memory node. dram_init_banksize() copies memory setup to bi_dram[]. This will avoid reading information from DT twice. Memory test start/end were changed to DDR location to let memtest still compiled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
30 lines
764 B
C
30 lines
764 B
C
/*
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* Configuration for Xilinx ZynqMP emulation platforms
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*
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* (C) Copyright 2014 - 2015 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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*
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* Based on Configuration for Versatile Express
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQMP_EP_H
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#define __CONFIG_ZYNQMP_EP_H
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#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
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#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
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#define CONFIG_ZYNQ_I2C0
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#define CONFIG_SYS_I2C_ZYNQ
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#define CONFIG_ZYNQ_EEPROM
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#define CONFIG_AHCI
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
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ZYNQMP_USB1_XHCI_BASEADDR}
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#define COUNTER_FREQUENCY 4000000
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_EP_H */
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