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https://github.com/brain-hackers/u-boot-brain
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![Yann Gautier](/assets/img/avatar_default.png)
Some MMC peripherals require specific power cycle sequence, where some registers need to be written between the regulator is turned off and then back on. This is the case for the MMC IP embedded in STM32MP1 SoC. In STM32MP157 reference manual [1], the power cycle sequence is: 1. Reset the SDMMC with the RCC.SDMMCxRST register bit. This will reset the SDMMC to the reset state and the CPSM and DPSM to the Idle state. 2. Disable the Vcc power to the card. 3. Set the SDMMC in power-cycle state. This will make that the SDMMC_D[7:0], SDMMC_CMD and SDMMC_CK are driven low, to prevent the card from being supplied through the signal lines. 4. After minimum 1ms enable the Vcc power to the card. 5. After the power ramp period set the SDMMC to the power-off state for minimum 1ms. The SDMMC_D[7:0], SDMMC_CMD and SDMMC_CK are set to drive “1”. 6. After the 1ms delay set the SDMMC to power-on state in which the SDMMC_CK clock will be enabled. 7. After 74 SDMMC_CK cycles the first command can be sent to the card. The step 3. cannot be handled by the current framework implementation. A new callback (host_power_cycle) is created, and called in mmc_power_cycle(), after mmc_power_off(). The incorrect power cycle sequence has shown some boot failures on STM32MP1 with some SD-cards, especially on cold boots when the input frequency is low (<= 25MHz). Those failures are no more seen with this correct power cycle sequence. [1] https://www.st.com/resource/en/reference_manual/DM00327659.pdf Signed-off-by: Yann Gautier <yann.gautier@st.com>
451 lines
9.6 KiB
C
451 lines
9.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <mmc.h>
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#include <dm.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include "mmc_private.h"
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int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct mmc *mmc = mmc_get_mmc_dev(dev);
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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int ret;
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mmmc_trace_before_send(mmc, cmd);
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if (ops->send_cmd)
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ret = ops->send_cmd(dev, cmd, data);
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else
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ret = -ENOSYS;
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mmmc_trace_after_send(mmc, cmd, ret);
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return ret;
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}
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int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
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{
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return dm_mmc_send_cmd(mmc->dev, cmd, data);
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}
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int dm_mmc_set_ios(struct udevice *dev)
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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if (!ops->set_ios)
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return -ENOSYS;
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return ops->set_ios(dev);
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}
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int mmc_set_ios(struct mmc *mmc)
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{
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return dm_mmc_set_ios(mmc->dev);
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}
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int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us)
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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if (!ops->wait_dat0)
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return -ENOSYS;
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return ops->wait_dat0(dev, state, timeout_us);
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}
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int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
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{
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return dm_mmc_wait_dat0(mmc->dev, state, timeout_us);
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}
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int dm_mmc_get_wp(struct udevice *dev)
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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if (!ops->get_wp)
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return -ENOSYS;
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return ops->get_wp(dev);
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}
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int mmc_getwp(struct mmc *mmc)
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{
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return dm_mmc_get_wp(mmc->dev);
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}
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int dm_mmc_get_cd(struct udevice *dev)
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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if (!ops->get_cd)
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return -ENOSYS;
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return ops->get_cd(dev);
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}
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int mmc_getcd(struct mmc *mmc)
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{
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return dm_mmc_get_cd(mmc->dev);
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}
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#ifdef MMC_SUPPORTS_TUNING
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int dm_mmc_execute_tuning(struct udevice *dev, uint opcode)
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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if (!ops->execute_tuning)
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return -ENOSYS;
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return ops->execute_tuning(dev, opcode);
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}
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int mmc_execute_tuning(struct mmc *mmc, uint opcode)
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{
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return dm_mmc_execute_tuning(mmc->dev, opcode);
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}
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#endif
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#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
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int dm_mmc_set_enhanced_strobe(struct udevice *dev)
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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if (ops->set_enhanced_strobe)
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return ops->set_enhanced_strobe(dev);
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return -ENOTSUPP;
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}
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int mmc_set_enhanced_strobe(struct mmc *mmc)
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{
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return dm_mmc_set_enhanced_strobe(mmc->dev);
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}
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#endif
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int dm_mmc_host_power_cycle(struct udevice *dev)
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{
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struct dm_mmc_ops *ops = mmc_get_ops(dev);
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if (ops->host_power_cycle)
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return ops->host_power_cycle(dev);
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return 0;
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}
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int mmc_host_power_cycle(struct mmc *mmc)
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{
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return dm_mmc_host_power_cycle(mmc->dev);
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}
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int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg)
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{
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int val;
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val = dev_read_u32_default(dev, "bus-width", 1);
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switch (val) {
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case 0x8:
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cfg->host_caps |= MMC_MODE_8BIT;
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/* fall through */
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case 0x4:
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cfg->host_caps |= MMC_MODE_4BIT;
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/* fall through */
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case 0x1:
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cfg->host_caps |= MMC_MODE_1BIT;
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break;
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default:
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dev_err(dev, "Invalid \"bus-width\" value %u!\n", val);
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return -EINVAL;
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}
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/* f_max is obtained from the optional "max-frequency" property */
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dev_read_u32(dev, "max-frequency", &cfg->f_max);
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if (dev_read_bool(dev, "cap-sd-highspeed"))
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cfg->host_caps |= MMC_CAP(SD_HS);
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if (dev_read_bool(dev, "cap-mmc-highspeed"))
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cfg->host_caps |= MMC_CAP(MMC_HS);
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if (dev_read_bool(dev, "sd-uhs-sdr12"))
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cfg->host_caps |= MMC_CAP(UHS_SDR12);
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if (dev_read_bool(dev, "sd-uhs-sdr25"))
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cfg->host_caps |= MMC_CAP(UHS_SDR25);
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if (dev_read_bool(dev, "sd-uhs-sdr50"))
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cfg->host_caps |= MMC_CAP(UHS_SDR50);
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if (dev_read_bool(dev, "sd-uhs-sdr104"))
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cfg->host_caps |= MMC_CAP(UHS_SDR104);
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if (dev_read_bool(dev, "sd-uhs-ddr50"))
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cfg->host_caps |= MMC_CAP(UHS_DDR50);
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if (dev_read_bool(dev, "mmc-ddr-1_8v"))
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cfg->host_caps |= MMC_CAP(MMC_DDR_52);
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if (dev_read_bool(dev, "mmc-ddr-1_2v"))
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cfg->host_caps |= MMC_CAP(MMC_DDR_52);
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if (dev_read_bool(dev, "mmc-hs200-1_8v"))
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cfg->host_caps |= MMC_CAP(MMC_HS_200);
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if (dev_read_bool(dev, "mmc-hs200-1_2v"))
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cfg->host_caps |= MMC_CAP(MMC_HS_200);
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if (dev_read_bool(dev, "mmc-hs400-1_8v"))
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cfg->host_caps |= MMC_CAP(MMC_HS_400);
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if (dev_read_bool(dev, "mmc-hs400-1_2v"))
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cfg->host_caps |= MMC_CAP(MMC_HS_400);
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if (dev_read_bool(dev, "mmc-hs400-enhanced-strobe"))
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cfg->host_caps |= MMC_CAP(MMC_HS_400_ES);
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if (dev_read_bool(dev, "non-removable")) {
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cfg->host_caps |= MMC_CAP_NONREMOVABLE;
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} else {
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if (dev_read_bool(dev, "cd-inverted"))
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cfg->host_caps |= MMC_CAP_CD_ACTIVE_HIGH;
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if (dev_read_bool(dev, "broken-cd"))
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cfg->host_caps |= MMC_CAP_NEEDS_POLL;
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}
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if (dev_read_bool(dev, "no-1-8-v")) {
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cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
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MMC_MODE_HS400 | MMC_MODE_HS400_ES);
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}
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return 0;
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}
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struct mmc *mmc_get_mmc_dev(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv;
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if (!device_active(dev))
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return NULL;
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upriv = dev_get_uclass_priv(dev);
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return upriv->mmc;
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}
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#if CONFIG_IS_ENABLED(BLK)
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struct mmc *find_mmc_device(int dev_num)
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{
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struct udevice *dev, *mmc_dev;
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int ret;
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ret = blk_find_device(IF_TYPE_MMC, dev_num, &dev);
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if (ret) {
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#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
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printf("MMC Device %d not found\n", dev_num);
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#endif
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return NULL;
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}
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mmc_dev = dev_get_parent(dev);
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struct mmc *mmc = mmc_get_mmc_dev(mmc_dev);
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return mmc;
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}
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int get_mmc_num(void)
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{
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return max((blk_find_max_devnum(IF_TYPE_MMC) + 1), 0);
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}
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int mmc_get_next_devnum(void)
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{
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return blk_find_max_devnum(IF_TYPE_MMC);
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}
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struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
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{
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struct blk_desc *desc;
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struct udevice *dev;
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device_find_first_child(mmc->dev, &dev);
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if (!dev)
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return NULL;
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desc = dev_get_uclass_platdata(dev);
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return desc;
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}
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void mmc_do_preinit(void)
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{
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struct udevice *dev;
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struct uclass *uc;
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int ret;
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ret = uclass_get(UCLASS_MMC, &uc);
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if (ret)
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return;
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uclass_foreach_dev(dev, uc) {
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struct mmc *m = mmc_get_mmc_dev(dev);
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if (!m)
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continue;
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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mmc_set_preinit(m, 1);
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#endif
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if (m->preinit)
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mmc_start_init(m);
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}
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}
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#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
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void print_mmc_devices(char separator)
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{
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struct udevice *dev;
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char *mmc_type;
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bool first = true;
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for (uclass_first_device(UCLASS_MMC, &dev);
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dev;
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uclass_next_device(&dev), first = false) {
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struct mmc *m = mmc_get_mmc_dev(dev);
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if (!first) {
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printf("%c", separator);
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if (separator != '\n')
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puts(" ");
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}
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if (m->has_init)
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mmc_type = IS_SD(m) ? "SD" : "eMMC";
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else
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mmc_type = NULL;
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printf("%s: %d", m->cfg->name, mmc_get_blk_desc(m)->devnum);
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if (mmc_type)
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printf(" (%s)", mmc_type);
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}
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printf("\n");
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}
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#else
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void print_mmc_devices(char separator) { }
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#endif
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int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg)
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{
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struct blk_desc *bdesc;
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struct udevice *bdev;
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int ret, devnum = -1;
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if (!mmc_get_ops(dev))
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return -ENOSYS;
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#ifndef CONFIG_SPL_BUILD
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/* Use the fixed index with aliase node's index */
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ret = dev_read_alias_seq(dev, &devnum);
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debug("%s: alias ret=%d, devnum=%d\n", __func__, ret, devnum);
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#endif
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ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC,
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devnum, 512, 0, &bdev);
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if (ret) {
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debug("Cannot create block device\n");
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return ret;
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}
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bdesc = dev_get_uclass_platdata(bdev);
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mmc->cfg = cfg;
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mmc->priv = dev;
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/* the following chunk was from mmc_register() */
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/* Setup dsr related values */
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mmc->dsr_imp = 0;
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mmc->dsr = 0xffffffff;
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/* Setup the universal parts of the block interface just once */
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bdesc->removable = 1;
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/* setup initial part type */
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bdesc->part_type = cfg->part_type;
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mmc->dev = dev;
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return 0;
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}
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int mmc_unbind(struct udevice *dev)
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{
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struct udevice *bdev;
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device_find_first_child(dev, &bdev);
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if (bdev) {
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device_remove(bdev, DM_REMOVE_NORMAL);
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device_unbind(bdev);
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}
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return 0;
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}
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static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
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{
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struct udevice *mmc_dev = dev_get_parent(bdev);
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struct mmc *mmc = mmc_get_mmc_dev(mmc_dev);
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struct blk_desc *desc = dev_get_uclass_platdata(bdev);
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int ret;
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if (desc->hwpart == hwpart)
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return 0;
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if (mmc->part_config == MMCPART_NOAVAILABLE)
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return -EMEDIUMTYPE;
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ret = mmc_switch_part(mmc, hwpart);
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if (!ret)
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blkcache_invalidate(desc->if_type, desc->devnum);
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return ret;
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}
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static int mmc_blk_probe(struct udevice *dev)
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{
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struct udevice *mmc_dev = dev_get_parent(dev);
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc_dev);
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struct mmc *mmc = upriv->mmc;
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int ret;
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ret = mmc_init(mmc);
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if (ret) {
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debug("%s: mmc_init() failed (err=%d)\n", __func__, ret);
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return ret;
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}
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return 0;
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}
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#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
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CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
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CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
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static int mmc_blk_remove(struct udevice *dev)
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{
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struct udevice *mmc_dev = dev_get_parent(dev);
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc_dev);
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struct mmc *mmc = upriv->mmc;
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return mmc_deinit(mmc);
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}
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#endif
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static const struct blk_ops mmc_blk_ops = {
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.read = mmc_bread,
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#if CONFIG_IS_ENABLED(MMC_WRITE)
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.write = mmc_bwrite,
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.erase = mmc_berase,
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#endif
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.select_hwpart = mmc_select_hwpart,
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};
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U_BOOT_DRIVER(mmc_blk) = {
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.name = "mmc_blk",
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.id = UCLASS_BLK,
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.ops = &mmc_blk_ops,
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.probe = mmc_blk_probe,
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#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
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CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
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CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
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.remove = mmc_blk_remove,
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.flags = DM_FLAG_OS_PREPARE,
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#endif
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};
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#endif /* CONFIG_BLK */
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UCLASS_DRIVER(mmc) = {
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.id = UCLASS_MMC,
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.name = "mmc",
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.flags = DM_UC_FLAG_SEQ_ALIAS,
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.per_device_auto_alloc_size = sizeof(struct mmc_uclass_priv),
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};
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