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https://github.com/brain-hackers/u-boot-brain
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126685ad44
Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux). Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
74 lines
1.3 KiB
Plaintext
74 lines
1.3 KiB
Plaintext
/dts-v1/;
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#include "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra20 Harmony evaluation board";
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compatible = "nvidia,harmony", "nvidia,tegra20";
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aliases {
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usb0 = "/usb@c5008000";
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usb1 = "/usb@c5004000";
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sdhci0 = "/sdhci@c8000600";
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sdhci1 = "/sdhci@c8000200";
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};
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memory {
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reg = <0x00000000 0x40000000>;
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};
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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nand-controller@70008000 {
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nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
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nvidia,width = <8>;
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nvidia,timing = <26 100 20 80 20 10 12 10 70>;
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nand@0 {
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reg = <0>;
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compatible = "hynix,hy27uf4g2b", "nand-flash";
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};
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};
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i2c@7000c000 {
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status = "disabled";
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};
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i2c@7000c400 {
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status = "disabled";
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};
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i2c@7000c500 {
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status = "disabled";
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};
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i2c@7000d000 {
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status = "disabled";
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};
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usb@c5000000 {
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status = "disabled";
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};
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usb@c5004000 {
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nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
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};
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sdhci@c8000200 {
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status = "okay";
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cd-gpios = <&gpio 69 1>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 155 0>; /* gpio PT3 */
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bus-width = <4>;
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};
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sdhci@c8000600 {
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status = "okay";
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cd-gpios = <&gpio 58 1>; /* gpio PH2 */
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wp-gpios = <&gpio 59 0>; /* gpio PH3 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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bus-width = <8>;
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};
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};
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