Lukas Auer 8c59f2023c riscv: add SPL support ... U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode. To be able to use SPL, boards have to provide a supported SPL boot device. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>		2019-08-26 16:07:42 +08:00
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ax25	riscv: add run mode configuration for SPL	2019-08-26 16:07:42 +08:00
generic	riscv: add SPL support	2019-08-26 16:07:42 +08:00
cpu.c	riscv: add run mode configuration for SPL	2019-08-26 16:07:42 +08:00
Makefile	riscv: Move trap handler codes to mtrap.S	2018-12-18 09:56:27 +08:00
mtrap.S	riscv: Return to previous privilege level after trap handling	2018-12-18 09:56:27 +08:00
start.S	riscv: add SPL support	2019-08-26 16:07:42 +08:00
u-boot-spl.lds	riscv: add SPL support	2019-08-26 16:07:42 +08:00
u-boot.lds	riscv: Make start.S available for all targets	2018-10-03 17:48:14 +08:00