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https://github.com/brain-hackers/u-boot-brain
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![wdenk](/assets/img/avatar_default.png)
* Patch by Rod Boyce, 21 Nov 2002: fix PCMCIA on MBX8xx board * Patch by Pierre Aubert , 21 Nov 2002 Add CFG_CPM_POST_WORD_ADDR to make the offset of the bootmode word in DPRAM configurable
139 lines
3.3 KiB
C
139 lines
3.3 KiB
C
/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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/*
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* CPU test
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*
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* This test checks the arithmetic logic unit (ALU) of CPU.
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* It tests independently various groups of instructions using
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* run-time modification of the code to reduce the memory footprint.
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* For more details refer to post/cpu/ *.c files.
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*/
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#ifdef CONFIG_POST
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#include <watchdog.h>
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#include <post.h>
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#if CONFIG_POST & CFG_POST_CPU
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extern int cpu_post_test_cmp (void);
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extern int cpu_post_test_cmpi (void);
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extern int cpu_post_test_two (void);
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extern int cpu_post_test_twox (void);
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extern int cpu_post_test_three (void);
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extern int cpu_post_test_threex (void);
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extern int cpu_post_test_threei (void);
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extern int cpu_post_test_andi (void);
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extern int cpu_post_test_srawi (void);
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extern int cpu_post_test_rlwnm (void);
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extern int cpu_post_test_rlwinm (void);
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extern int cpu_post_test_rlwimi (void);
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extern int cpu_post_test_store (void);
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extern int cpu_post_test_load (void);
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extern int cpu_post_test_cr (void);
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extern int cpu_post_test_b (void);
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extern int cpu_post_test_multi (void);
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extern int cpu_post_test_string (void);
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extern int cpu_post_test_complex (void);
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ulong cpu_post_makecr (long v)
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{
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ulong cr = 0;
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if (v < 0)
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cr |= 0x80000000;
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if (v > 0)
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cr |= 0x40000000;
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if (v == 0)
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cr |= 0x20000000;
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return cr;
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}
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int cpu_post_test (int flags)
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{
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int ic = icache_status ();
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int ret = 0;
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WATCHDOG_RESET();
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if (ic)
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icache_disable ();
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if (ret == 0)
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ret = cpu_post_test_cmp ();
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if (ret == 0)
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ret = cpu_post_test_cmpi ();
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if (ret == 0)
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ret = cpu_post_test_two ();
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if (ret == 0)
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ret = cpu_post_test_twox ();
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WATCHDOG_RESET();
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if (ret == 0)
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ret = cpu_post_test_three ();
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if (ret == 0)
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ret = cpu_post_test_threex ();
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if (ret == 0)
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ret = cpu_post_test_threei ();
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if (ret == 0)
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ret = cpu_post_test_andi ();
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WATCHDOG_RESET();
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if (ret == 0)
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ret = cpu_post_test_srawi ();
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if (ret == 0)
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ret = cpu_post_test_rlwnm ();
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if (ret == 0)
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ret = cpu_post_test_rlwinm ();
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if (ret == 0)
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ret = cpu_post_test_rlwimi ();
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WATCHDOG_RESET();
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if (ret == 0)
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ret = cpu_post_test_store ();
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if (ret == 0)
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ret = cpu_post_test_load ();
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if (ret == 0)
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ret = cpu_post_test_cr ();
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if (ret == 0)
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ret = cpu_post_test_b ();
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WATCHDOG_RESET();
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if (ret == 0)
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ret = cpu_post_test_multi ();
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if (ret == 0)
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ret = cpu_post_test_string ();
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if (ret == 0)
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ret = cpu_post_test_complex ();
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WATCHDOG_RESET();
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if (ic)
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icache_enable ();
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WATCHDOG_RESET();
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return ret;
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}
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#endif /* CONFIG_POST & CFG_POST_CPU */
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#endif /* CONFIG_POST */
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