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e9ccb2f526
Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 lines
190 B
Makefile
14 lines
190 B
Makefile
#
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# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += clk_px30.o
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ifndef CONFIG_TPL_BUILD
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obj-y += syscon_px30.o
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endif
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obj-y += px30.o
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