mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 10:46:15 +09:00
d4fc6012fd
Merge to two at45.c files into a common file, split to at45.c and spi.c Fix spelling error in DM9161 PHY Support. Initialize at91rm9200 board (and set LED). Add PIO control for at91rm9200dk LEDs and Mux. Change dataflash partition boundaries to be compatible with Linux 2.6. Signed-off-by: Peter Pearse <peter.pearse@arm.com> Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
428 lines
9.5 KiB
C
428 lines
9.5 KiB
C
/*
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* (C) Copyright 2001, 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* This has been changed substantially by Gerald Van Baren, Custom IDEAS,
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* vanbaren@cideas.com. It was heavily influenced by LiMon, written by
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* Neil Russell.
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*/
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#include <common.h>
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#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
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#include <ioports.h>
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#endif
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#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#endif
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#ifdef CONFIG_IXP425 /* only valid for IXP425 */
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#include <asm/arch/ixp425.h>
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#endif
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#ifdef CONFIG_LPC2292
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#include <asm/arch/hardware.h>
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#endif
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#include <i2c.h>
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#if defined(CONFIG_SOFT_I2C)
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/* #define DEBUG_I2C */
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#ifdef DEBUG_I2C
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DECLARE_GLOBAL_DATA_PTR;
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#endif
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/*-----------------------------------------------------------------------
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* Definitions
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*/
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#define RETRIES 0
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#define I2C_ACK 0 /* PD_SDA level to ack a byte */
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#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
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#ifdef DEBUG_I2C
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#define PRINTD(fmt,args...) do { \
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if (gd->have_console) \
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printf (fmt ,##args); \
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} while (0)
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#else
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#define PRINTD(fmt,args...)
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#endif
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/*-----------------------------------------------------------------------
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* Local functions
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*/
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static void send_reset (void);
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static void send_start (void);
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static void send_stop (void);
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static void send_ack (int);
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static int write_byte (uchar byte);
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static uchar read_byte (int);
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/*-----------------------------------------------------------------------
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* Send a reset sequence consisting of 9 clocks with the data signal high
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* to clock any confused device back into an idle state. Also send a
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* <stop> at the end of the sequence for belts & suspenders.
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*/
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static void send_reset(void)
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{
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#ifdef CONFIG_MPC8260
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volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
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#endif
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#ifdef CONFIG_8xx
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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#endif
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int j;
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I2C_SCL(1);
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I2C_SDA(1);
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#ifdef I2C_INIT
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I2C_INIT;
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#endif
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I2C_TRISTATE;
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for(j = 0; j < 9; j++) {
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I2C_SCL(0);
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I2C_DELAY;
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I2C_DELAY;
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I2C_SCL(1);
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I2C_DELAY;
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I2C_DELAY;
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}
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send_stop();
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I2C_TRISTATE;
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}
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/*-----------------------------------------------------------------------
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* START: High -> Low on SDA while SCL is High
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*/
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static void send_start(void)
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{
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#ifdef CONFIG_MPC8260
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volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
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#endif
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#ifdef CONFIG_8xx
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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#endif
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I2C_DELAY;
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I2C_SDA(1);
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I2C_ACTIVE;
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I2C_DELAY;
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I2C_SCL(1);
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I2C_DELAY;
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I2C_SDA(0);
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I2C_DELAY;
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}
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/*-----------------------------------------------------------------------
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* STOP: Low -> High on SDA while SCL is High
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*/
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static void send_stop(void)
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{
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#ifdef CONFIG_MPC8260
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volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
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#endif
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#ifdef CONFIG_8xx
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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#endif
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I2C_SCL(0);
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I2C_DELAY;
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I2C_SDA(0);
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I2C_ACTIVE;
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I2C_DELAY;
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I2C_SCL(1);
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I2C_DELAY;
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I2C_SDA(1);
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I2C_DELAY;
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I2C_TRISTATE;
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}
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/*-----------------------------------------------------------------------
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* ack should be I2C_ACK or I2C_NOACK
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*/
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static void send_ack(int ack)
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{
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#ifdef CONFIG_MPC8260
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volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
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#endif
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#ifdef CONFIG_8xx
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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#endif
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I2C_SCL(0);
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I2C_DELAY;
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I2C_ACTIVE;
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I2C_SDA(ack);
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I2C_DELAY;
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I2C_SCL(1);
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I2C_DELAY;
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I2C_DELAY;
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I2C_SCL(0);
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I2C_DELAY;
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}
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/*-----------------------------------------------------------------------
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* Send 8 bits and look for an acknowledgement.
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*/
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static int write_byte(uchar data)
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{
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#ifdef CONFIG_MPC8260
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volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
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#endif
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#ifdef CONFIG_8xx
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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#endif
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int j;
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int nack;
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I2C_ACTIVE;
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for(j = 0; j < 8; j++) {
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I2C_SCL(0);
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I2C_DELAY;
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I2C_SDA(data & 0x80);
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I2C_DELAY;
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I2C_SCL(1);
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I2C_DELAY;
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I2C_DELAY;
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data <<= 1;
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}
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/*
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* Look for an <ACK>(negative logic) and return it.
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*/
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I2C_SCL(0);
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I2C_DELAY;
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I2C_SDA(1);
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I2C_TRISTATE;
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I2C_DELAY;
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I2C_SCL(1);
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I2C_DELAY;
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I2C_DELAY;
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nack = I2C_READ;
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I2C_SCL(0);
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I2C_DELAY;
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I2C_ACTIVE;
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return(nack); /* not a nack is an ack */
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}
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/*-----------------------------------------------------------------------
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* if ack == I2C_ACK, ACK the byte so can continue reading, else
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* send I2C_NOACK to end the read.
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*/
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static uchar read_byte(int ack)
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{
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#ifdef CONFIG_MPC8260
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volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
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#endif
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#ifdef CONFIG_8xx
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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#endif
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int data;
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int j;
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/*
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* Read 8 bits, MSB first.
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*/
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I2C_TRISTATE;
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data = 0;
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for(j = 0; j < 8; j++) {
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I2C_SCL(0);
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I2C_DELAY;
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I2C_SCL(1);
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I2C_DELAY;
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data <<= 1;
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data |= I2C_READ;
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I2C_DELAY;
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}
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send_ack(ack);
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return(data);
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}
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/*=====================================================================*/
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/* Public Functions */
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/*=====================================================================*/
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/*-----------------------------------------------------------------------
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* Initialization
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*/
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void i2c_init (int speed, int slaveaddr)
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{
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/*
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* WARNING: Do NOT save speed in a static variable: if the
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* I2C routines are called before RAM is initialized (to read
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* the DIMM SPD, for instance), RAM won't be usable and your
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* system will crash.
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*/
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send_reset ();
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}
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/*-----------------------------------------------------------------------
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* Probe to see if a chip is present. Also good for checking for the
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* completion of EEPROM writes since the chip stops responding until
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* the write completes (typically 10mSec).
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*/
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int i2c_probe(uchar addr)
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{
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int rc;
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/*
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* perform 1 byte write transaction with just address byte
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* (fake write)
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*/
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send_start();
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rc = write_byte ((addr << 1) | 0);
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send_stop();
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return (rc ? 1 : 0);
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}
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/*-----------------------------------------------------------------------
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* Read bytes
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*/
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int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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int shift;
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PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
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chip, addr, alen, buffer, len);
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#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
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/*
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* EEPROM chips that implement "address overflow" are ones
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* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
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* address and the extra bits end up in the "chip address"
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* bit slots. This makes a 24WC08 (1Kbyte) chip look like
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* four 256 byte chips.
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*
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* Note that we consider the length of the address field to
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* still be one byte because the extra address bits are
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* hidden in the chip address.
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*/
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chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
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PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
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chip, addr);
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#endif
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/*
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* Do the addressing portion of a write cycle to set the
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* chip's address pointer. If the address length is zero,
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* don't do the normal write cycle to set the address pointer,
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* there is no address pointer in this chip.
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*/
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send_start();
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if(alen > 0) {
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if(write_byte(chip << 1)) { /* write cycle */
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send_stop();
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PRINTD("i2c_read, no chip responded %02X\n", chip);
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return(1);
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}
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shift = (alen-1) * 8;
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while(alen-- > 0) {
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if(write_byte(addr >> shift)) {
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PRINTD("i2c_read, address not <ACK>ed\n");
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return(1);
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}
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shift -= 8;
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}
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send_stop(); /* reportedly some chips need a full stop */
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send_start();
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}
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/*
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* Send the chip address again, this time for a read cycle.
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* Then read the data. On the last byte, we do a NACK instead
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* of an ACK(len == 0) to terminate the read.
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*/
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write_byte((chip << 1) | 1); /* read cycle */
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while(len-- > 0) {
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*buffer++ = read_byte(len == 0);
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}
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send_stop();
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return(0);
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}
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/*-----------------------------------------------------------------------
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* Write bytes
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*/
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int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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int shift, failures = 0;
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PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
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chip, addr, alen, buffer, len);
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send_start();
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if(write_byte(chip << 1)) { /* write cycle */
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send_stop();
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PRINTD("i2c_write, no chip responded %02X\n", chip);
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return(1);
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}
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shift = (alen-1) * 8;
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while(alen-- > 0) {
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if(write_byte(addr >> shift)) {
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PRINTD("i2c_write, address not <ACK>ed\n");
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return(1);
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}
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shift -= 8;
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}
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while(len-- > 0) {
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if(write_byte(*buffer++)) {
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failures++;
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}
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}
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send_stop();
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return(failures);
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}
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/*-----------------------------------------------------------------------
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* Read a register
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*/
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uchar i2c_reg_read(uchar i2c_addr, uchar reg)
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{
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uchar buf;
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i2c_read(i2c_addr, reg, 1, &buf, 1);
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return(buf);
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}
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/*-----------------------------------------------------------------------
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* Write a register
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*/
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void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
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{
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i2c_write(i2c_addr, reg, 1, &val, 1);
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}
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#endif /* CONFIG_SOFT_I2C */
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