mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-21 18:39:43 +09:00
a1ce9ed063
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - DM_VIDEO support (display_dev.h). - boot0.h added, handles NSIH --> tools/nexell obsolete. - gpio.h: Include-path to errno.h changed. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
216 lines
6.6 KiB
C
216 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+
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*
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* Defines for Mobile Industry Processor Interface (MIPI(R))
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* Display Working Group standards: DSI, DCS, DBI, DPI
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*
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* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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* Copyright (C) 2006 Nokia Corporation
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* Author: Imre Deak <imre.deak@nokia.com>
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*/
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#ifndef MIPI_DISPLAY_H
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#define MIPI_DISPLAY_H
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/* MIPI DSI Processor-to-Peripheral transaction types */
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enum {
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MIPI_DSI_V_SYNC_START = 0x01,
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MIPI_DSI_V_SYNC_END = 0x11,
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MIPI_DSI_H_SYNC_START = 0x21,
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MIPI_DSI_H_SYNC_END = 0x31,
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MIPI_DSI_COLOR_MODE_OFF = 0x02,
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MIPI_DSI_COLOR_MODE_ON = 0x12,
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MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
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MIPI_DSI_TURN_ON_PERIPHERAL = 0x32,
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MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03,
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MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13,
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MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23,
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MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04,
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MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14,
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MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24,
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MIPI_DSI_DCS_SHORT_WRITE = 0x05,
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MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
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MIPI_DSI_DCS_READ = 0x06,
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MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37,
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MIPI_DSI_END_OF_TRANSMISSION = 0x08,
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MIPI_DSI_NULL_PACKET = 0x09,
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MIPI_DSI_BLANKING_PACKET = 0x19,
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MIPI_DSI_GENERIC_LONG_WRITE = 0x29,
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MIPI_DSI_DCS_LONG_WRITE = 0x39,
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MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c,
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MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c,
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MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c,
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MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d,
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MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d,
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MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d,
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MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e,
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MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e,
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MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e,
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MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e,
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};
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/* MIPI DSI Peripheral-to-Processor transaction types */
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enum {
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MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02,
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MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08,
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MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11,
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MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12,
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MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a,
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MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c,
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MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21,
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MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22,
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};
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/* MIPI DCS commands */
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enum {
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MIPI_DCS_NOP = 0x00,
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MIPI_DCS_SOFT_RESET = 0x01,
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MIPI_DCS_GET_DISPLAY_ID = 0x04,
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MIPI_DCS_GET_RED_CHANNEL = 0x06,
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MIPI_DCS_GET_GREEN_CHANNEL = 0x07,
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MIPI_DCS_GET_BLUE_CHANNEL = 0x08,
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MIPI_DCS_GET_DISPLAY_STATUS = 0x09,
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MIPI_DCS_GET_POWER_MODE = 0x0A,
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MIPI_DCS_GET_ADDRESS_MODE = 0x0B,
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MIPI_DCS_GET_PIXEL_FORMAT = 0x0C,
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MIPI_DCS_GET_DISPLAY_MODE = 0x0D,
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MIPI_DCS_GET_SIGNAL_MODE = 0x0E,
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MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F,
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MIPI_DCS_ENTER_SLEEP_MODE = 0x10,
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MIPI_DCS_EXIT_SLEEP_MODE = 0x11,
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MIPI_DCS_ENTER_PARTIAL_MODE = 0x12,
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MIPI_DCS_ENTER_NORMAL_MODE = 0x13,
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MIPI_DCS_EXIT_INVERT_MODE = 0x20,
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MIPI_DCS_ENTER_INVERT_MODE = 0x21,
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MIPI_DCS_SET_GAMMA_CURVE = 0x26,
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MIPI_DCS_SET_DISPLAY_OFF = 0x28,
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MIPI_DCS_SET_DISPLAY_ON = 0x29,
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MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A,
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MIPI_DCS_SET_PAGE_ADDRESS = 0x2B,
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MIPI_DCS_WRITE_MEMORY_START = 0x2C,
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MIPI_DCS_WRITE_LUT = 0x2D,
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MIPI_DCS_READ_MEMORY_START = 0x2E,
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MIPI_DCS_SET_PARTIAL_AREA = 0x30,
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MIPI_DCS_SET_SCROLL_AREA = 0x33,
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MIPI_DCS_SET_TEAR_OFF = 0x34,
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MIPI_DCS_SET_TEAR_ON = 0x35,
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MIPI_DCS_SET_ADDRESS_MODE = 0x36,
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MIPI_DCS_SET_SCROLL_START = 0x37,
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MIPI_DCS_EXIT_IDLE_MODE = 0x38,
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MIPI_DCS_ENTER_IDLE_MODE = 0x39,
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MIPI_DCS_SET_PIXEL_FORMAT = 0x3A,
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MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C,
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MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
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MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
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MIPI_DCS_GET_SCANLINE = 0x45,
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MIPI_DCS_READ_DDB_START = 0xA1,
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MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
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};
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/* MIPI DCS pixel formats */
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#define MIPI_DCS_PIXEL_FMT_24BIT 7
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#define MIPI_DCS_PIXEL_FMT_18BIT 6
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#define MIPI_DCS_PIXEL_FMT_16BIT 5
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#define MIPI_DCS_PIXEL_FMT_12BIT 3
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#define MIPI_DCS_PIXEL_FMT_8BIT 2
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#define MIPI_DCS_PIXEL_FMT_3BIT 1
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/* request ACK from peripheral */
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#define MIPI_DSI_MSG_REQ_ACK BIT(0)
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/* use Low Power Mode to transmit message */
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#define MIPI_DSI_MSG_USE_LPM BIT(1)
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/**
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* struct mipi_dsi_msg - read/write DSI buffer
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* @channel: virtual channel id
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* @type: payload data type
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* @flags: flags controlling this message transmission
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* @tx_len: length of @tx_buf
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* @tx_buf: data to be written
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* @rx_len: length of @rx_buf
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* @rx_buf: data to be read, or NULL
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*/
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struct mipi_dsi_msg {
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u8 channel; /* virtual channel id */
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u8 type; /* payload data type */
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u16 flags; /* flags controlling this message transmission */
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size_t tx_len;
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const void *tx_buf;
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size_t rx_len;
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void *rx_buf;
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};
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/* DSI mode flags */
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/* video mode */
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#define MIPI_DSI_MODE_VIDEO BIT(0)
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/* video burst mode */
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#define MIPI_DSI_MODE_VIDEO_BURST BIT(1)
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/* video pulse mode */
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#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2)
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/* enable auto vertical count mode */
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#define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3)
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/* enable hsync-end packets in vsync-pulse and v-porch area */
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#define MIPI_DSI_MODE_VIDEO_HSE BIT(4)
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/* disable hfront-porch area */
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#define MIPI_DSI_MODE_VIDEO_HFP BIT(5)
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/* disable hback-porch area */
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#define MIPI_DSI_MODE_VIDEO_HBP BIT(6)
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/* disable hsync-active area */
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#define MIPI_DSI_MODE_VIDEO_HSA BIT(7)
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/* flush display FIFO on vsync pulse */
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#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
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/* disable EoT packets in HS mode */
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#define MIPI_DSI_MODE_EOT_PACKET BIT(9)
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/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
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#define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
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/* transmit data in low power */
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#define MIPI_DSI_MODE_LPM BIT(11) /* DSI mode flags */
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enum mipi_dsi_pixel_format {
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MIPI_DSI_FMT_RGB888,
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MIPI_DSI_FMT_RGB666,
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MIPI_DSI_FMT_RGB666_PACKED,
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MIPI_DSI_FMT_RGB565,
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};
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/**
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* struct mipi_dsi_device - DSI peripheral device
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* @host: DSI host for this peripheral
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* @dev: driver model device node for this peripheral
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* @channel: virtual channel assigned to the peripheral
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* @format: pixel format for video mode
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* @lanes: number of active data lanes
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* @mode_flags: DSI operation mode related flags
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*/
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struct mipi_dsi_device {
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unsigned int channel;
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unsigned int lanes;
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enum mipi_dsi_pixel_format format;
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unsigned long mode_flags;
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struct mipi_panel_ops *ops;
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ssize_t (*write_buffer)(struct mipi_dsi_device *dsi,
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const void *data, size_t len);
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};
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struct mipi_panel_ops {
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int (*init)(struct mipi_dsi_device *dsi, int width, int height);
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int (*prepare)(struct mipi_dsi_device *dsi);
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int (*unprepare)(struct mipi_dsi_device *dsi);
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int (*enable)(struct mipi_dsi_device *dsi);
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int (*disable)(struct mipi_dsi_device *dsi);
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void *private_data;
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};
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#endif
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