Gabriel Huau 8827227889 x86: minnowmax: add GPIO banks in the device tree ... There are 6 banks: 4 banks for CORE: available in S0 mode 2 banks for SUS (Suspend): available in S0-S5 mode Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>		2015-04-29 18:51:49 -06:00
..
cpu	x86: queensbay: Implement PIRQ routing	2015-04-29 18:51:49 -06:00
dts	x86: minnowmax: add GPIO banks in the device tree	2015-04-29 18:51:49 -06:00
include/asm	x86: baytrail: fix the GPIOBASE address	2015-04-29 18:51:49 -06:00
lib	x86: Support platform PIRQ routing	2015-04-29 18:51:49 -06:00
config.mk	generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig	2015-03-28 09:03:08 -04:00
Kconfig	x86: Support platform PIRQ routing	2015-04-29 18:51:49 -06:00
Makefile	Kbuild: introduce Makefile in arch/$ARCH/	2014-12-08 09:35:45 -05:00