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https://github.com/brain-hackers/u-boot-brain
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87e29878ca
This board runs a P5020 or P5040 chip, and utilizes an EEPROM with similar formatting to the Freescale P5020DS. Large amounts of this code were developed by Adrian Cox <adrian at humboldt dot co dot uk> Signed-off-by: Andy Fleming <afleming@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
28 lines
760 B
C
28 lines
760 B
C
/*
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* Author: Adrian Cox
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* Based on corenet_ds law files.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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struct law_entry law_table[] = {
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SET_LAW(CONFIG_SYS_LBC0_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
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SET_LAW(CONFIG_SYS_LBC1_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC),
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#ifdef CONFIG_SYS_BMAN_MEM_PHYS
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SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN),
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#endif
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#ifdef CONFIG_SYS_QMAN_MEM_PHYS
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SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN),
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#endif
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#ifdef CONFIG_SYS_DCSRBAR_PHYS
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/* Limit DCSR to 32M to access NPC Trace Buffer */
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SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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#endif
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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