mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-29 21:38:52 +09:00
1295 lines
32 KiB
C
1295 lines
32 KiB
C
/*
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* linux/drivers/mtd/onenand/onenand_base.c
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*
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* Copyright (C) 2005-2007 Samsung Electronics
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* Kyungmin Park <kyungmin.park@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <common.h>
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#ifdef CONFIG_CMD_ONENAND
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#include <linux/mtd/compat.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/onenand.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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static const unsigned char ffchars[] = {
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
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};
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/**
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* onenand_readw - [OneNAND Interface] Read OneNAND register
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* @param addr address to read
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*
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* Read OneNAND register
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*/
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static unsigned short onenand_readw(void __iomem * addr)
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{
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return readw(addr);
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}
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/**
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* onenand_writew - [OneNAND Interface] Write OneNAND register with value
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* @param value value to write
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* @param addr address to write
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*
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* Write OneNAND register with value
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*/
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static void onenand_writew(unsigned short value, void __iomem * addr)
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{
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writew(value, addr);
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}
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/**
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* onenand_block_address - [DEFAULT] Get block address
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* @param device the device id
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* @param block the block
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* @return translated block address if DDP, otherwise same
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*
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* Setup Start Address 1 Register (F100h)
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*/
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static int onenand_block_address(int device, int block)
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{
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if (device & ONENAND_DEVICE_IS_DDP) {
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/* Device Flash Core select, NAND Flash Block Address */
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int dfs = 0, density, mask;
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density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
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mask = (1 << (density + 6));
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if (block & mask)
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dfs = 1;
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return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
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}
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return block;
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}
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/**
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* onenand_bufferram_address - [DEFAULT] Get bufferram address
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* @param device the device id
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* @param block the block
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* @return set DBS value if DDP, otherwise 0
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*
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* Setup Start Address 2 Register (F101h) for DDP
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*/
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static int onenand_bufferram_address(int device, int block)
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{
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if (device & ONENAND_DEVICE_IS_DDP) {
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/* Device BufferRAM Select */
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int dbs = 0, density, mask;
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density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
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mask = (1 << (density + 6));
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if (block & mask)
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dbs = 1;
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return (dbs << ONENAND_DDP_SHIFT);
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}
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return 0;
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}
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/**
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* onenand_page_address - [DEFAULT] Get page address
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* @param page the page address
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* @param sector the sector address
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* @return combined page and sector address
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*
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* Setup Start Address 8 Register (F107h)
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*/
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static int onenand_page_address(int page, int sector)
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{
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/* Flash Page Address, Flash Sector Address */
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int fpa, fsa;
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fpa = page & ONENAND_FPA_MASK;
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fsa = sector & ONENAND_FSA_MASK;
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return ((fpa << ONENAND_FPA_SHIFT) | fsa);
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}
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/**
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* onenand_buffer_address - [DEFAULT] Get buffer address
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* @param dataram1 DataRAM index
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* @param sectors the sector address
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* @param count the number of sectors
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* @return the start buffer value
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*
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* Setup Start Buffer Register (F200h)
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*/
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static int onenand_buffer_address(int dataram1, int sectors, int count)
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{
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int bsa, bsc;
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/* BufferRAM Sector Address */
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bsa = sectors & ONENAND_BSA_MASK;
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if (dataram1)
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bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
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else
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bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
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/* BufferRAM Sector Count */
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bsc = count & ONENAND_BSC_MASK;
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return ((bsa << ONENAND_BSA_SHIFT) | bsc);
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}
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/**
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* onenand_command - [DEFAULT] Send command to OneNAND device
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* @param mtd MTD device structure
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* @param cmd the command to be sent
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* @param addr offset to read from or write to
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* @param len number of bytes to read or write
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*
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* Send command to OneNAND device. This function is used for middle/large page
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* devices (1KB/2KB Bytes per page)
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*/
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static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
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size_t len)
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{
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struct onenand_chip *this = mtd->priv;
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int value, readcmd = 0;
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int block, page;
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/* Now we use page size operation */
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int sectors = 4, count = 4;
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/* Address translation */
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switch (cmd) {
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case ONENAND_CMD_UNLOCK:
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case ONENAND_CMD_LOCK:
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case ONENAND_CMD_LOCK_TIGHT:
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block = -1;
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page = -1;
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break;
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case ONENAND_CMD_ERASE:
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case ONENAND_CMD_BUFFERRAM:
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block = (int)(addr >> this->erase_shift);
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page = -1;
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break;
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default:
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block = (int)(addr >> this->erase_shift);
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page = (int)(addr >> this->page_shift);
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page &= this->page_mask;
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break;
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}
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/* NOTE: The setting order of the registers is very important! */
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if (cmd == ONENAND_CMD_BUFFERRAM) {
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/* Select DataRAM for DDP */
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value = onenand_bufferram_address(this->device_id, block);
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this->write_word(value,
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this->base + ONENAND_REG_START_ADDRESS2);
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/* Switch to the next data buffer */
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ONENAND_SET_NEXT_BUFFERRAM(this);
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return 0;
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}
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if (block != -1) {
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/* Write 'DFS, FBA' of Flash */
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value = onenand_block_address(this->device_id, block);
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this->write_word(value,
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this->base + ONENAND_REG_START_ADDRESS1);
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}
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if (page != -1) {
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int dataram;
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switch (cmd) {
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case ONENAND_CMD_READ:
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case ONENAND_CMD_READOOB:
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dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
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readcmd = 1;
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break;
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default:
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dataram = ONENAND_CURRENT_BUFFERRAM(this);
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break;
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}
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/* Write 'FPA, FSA' of Flash */
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value = onenand_page_address(page, sectors);
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this->write_word(value,
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this->base + ONENAND_REG_START_ADDRESS8);
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/* Write 'BSA, BSC' of DataRAM */
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value = onenand_buffer_address(dataram, sectors, count);
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this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
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if (readcmd) {
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/* Select DataRAM for DDP */
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value =
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onenand_bufferram_address(this->device_id, block);
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this->write_word(value,
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this->base +
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ONENAND_REG_START_ADDRESS2);
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}
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}
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/* Interrupt clear */
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this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
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/* Write command */
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this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
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return 0;
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}
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/**
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* onenand_wait - [DEFAULT] wait until the command is done
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* @param mtd MTD device structure
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* @param state state to select the max. timeout value
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*
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* Wait for command done. This applies to all OneNAND command
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* Read can take up to 30us, erase up to 2ms and program up to 350us
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* according to general OneNAND specs
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*/
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static int onenand_wait(struct mtd_info *mtd, int state)
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{
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struct onenand_chip *this = mtd->priv;
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unsigned int flags = ONENAND_INT_MASTER;
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unsigned int interrupt = 0;
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unsigned int ctrl, ecc;
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while (1) {
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interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
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if (interrupt & flags)
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break;
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}
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ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
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if (ctrl & ONENAND_CTRL_ERROR) {
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DEBUG(MTD_DEBUG_LEVEL0,
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"onenand_wait: controller error = 0x%04x\n", ctrl);
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return -EAGAIN;
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}
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if (ctrl & ONENAND_CTRL_LOCK) {
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DEBUG(MTD_DEBUG_LEVEL0,
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"onenand_wait: it's locked error = 0x%04x\n", ctrl);
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return -EIO;
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}
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if (interrupt & ONENAND_INT_READ) {
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ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
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if (ecc & ONENAND_ECC_2BIT_ALL) {
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DEBUG(MTD_DEBUG_LEVEL0,
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"onenand_wait: ECC error = 0x%04x\n", ecc);
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return -EBADMSG;
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}
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}
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return 0;
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}
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/**
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* onenand_bufferram_offset - [DEFAULT] BufferRAM offset
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* @param mtd MTD data structure
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* @param area BufferRAM area
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* @return offset given area
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*
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* Return BufferRAM offset given area
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*/
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static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
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{
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struct onenand_chip *this = mtd->priv;
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if (ONENAND_CURRENT_BUFFERRAM(this)) {
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if (area == ONENAND_DATARAM)
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return mtd->oobblock;
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if (area == ONENAND_SPARERAM)
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return mtd->oobsize;
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}
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return 0;
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}
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/**
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* onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
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* @param mtd MTD data structure
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* @param area BufferRAM area
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* @param buffer the databuffer to put/get data
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* @param offset offset to read from or write to
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* @param count number of bytes to read/write
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*
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* Read the BufferRAM area
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*/
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static int onenand_read_bufferram(struct mtd_info *mtd, int area,
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unsigned char *buffer, int offset,
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size_t count)
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{
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struct onenand_chip *this = mtd->priv;
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void __iomem *bufferram;
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bufferram = this->base + area;
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bufferram += onenand_bufferram_offset(mtd, area);
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memcpy(buffer, bufferram + offset, count);
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return 0;
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}
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/**
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* onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
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* @param mtd MTD data structure
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* @param area BufferRAM area
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* @param buffer the databuffer to put/get data
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* @param offset offset to read from or write to
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* @param count number of bytes to read/write
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*
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* Read the BufferRAM area with Sync. Burst Mode
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*/
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static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
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unsigned char *buffer, int offset,
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size_t count)
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{
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struct onenand_chip *this = mtd->priv;
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void __iomem *bufferram;
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bufferram = this->base + area;
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bufferram += onenand_bufferram_offset(mtd, area);
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this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
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memcpy(buffer, bufferram + offset, count);
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this->mmcontrol(mtd, 0);
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return 0;
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}
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/**
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* onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
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* @param mtd MTD data structure
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* @param area BufferRAM area
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* @param buffer the databuffer to put/get data
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* @param offset offset to read from or write to
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* @param count number of bytes to read/write
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*
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* Write the BufferRAM area
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*/
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static int onenand_write_bufferram(struct mtd_info *mtd, int area,
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const unsigned char *buffer, int offset,
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size_t count)
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{
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struct onenand_chip *this = mtd->priv;
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void __iomem *bufferram;
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bufferram = this->base + area;
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bufferram += onenand_bufferram_offset(mtd, area);
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memcpy(bufferram + offset, buffer, count);
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return 0;
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}
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/**
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* onenand_check_bufferram - [GENERIC] Check BufferRAM information
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* @param mtd MTD data structure
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* @param addr address to check
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* @return 1 if there are valid data, otherwise 0
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*
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* Check bufferram if there is data we required
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*/
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static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
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{
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struct onenand_chip *this = mtd->priv;
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int block, page;
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int i;
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block = (int)(addr >> this->erase_shift);
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page = (int)(addr >> this->page_shift);
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page &= this->page_mask;
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i = ONENAND_CURRENT_BUFFERRAM(this);
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/* Is there valid data? */
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if (this->bufferram[i].block == block &&
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this->bufferram[i].page == page && this->bufferram[i].valid)
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return 1;
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return 0;
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}
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/**
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* onenand_update_bufferram - [GENERIC] Update BufferRAM information
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* @param mtd MTD data structure
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* @param addr address to update
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* @param valid valid flag
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*
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* Update BufferRAM information
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*/
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static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
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int valid)
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{
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struct onenand_chip *this = mtd->priv;
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int block, page;
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int i;
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block = (int)(addr >> this->erase_shift);
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page = (int)(addr >> this->page_shift);
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page &= this->page_mask;
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/* Invalidate BufferRAM */
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for (i = 0; i < MAX_BUFFERRAM; i++) {
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if (this->bufferram[i].block == block &&
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this->bufferram[i].page == page)
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this->bufferram[i].valid = 0;
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}
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/* Update BufferRAM */
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i = ONENAND_CURRENT_BUFFERRAM(this);
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this->bufferram[i].block = block;
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this->bufferram[i].page = page;
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this->bufferram[i].valid = valid;
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return 0;
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}
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/**
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* onenand_get_device - [GENERIC] Get chip for selected access
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* @param mtd MTD device structure
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* @param new_state the state which is requested
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*
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* Get the device and lock it for exclusive access
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*/
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static void onenand_get_device(struct mtd_info *mtd, int new_state)
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{
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/* Do nothing */
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}
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/**
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* onenand_release_device - [GENERIC] release chip
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* @param mtd MTD device structure
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*
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* Deselect, release chip lock and wake up anyone waiting on the device
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*/
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static void onenand_release_device(struct mtd_info *mtd)
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{
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/* Do nothing */
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}
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/**
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* onenand_read_ecc - [MTD Interface] Read data with ECC
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* @param mtd MTD device structure
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* @param from offset to read from
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* @param len number of bytes to read
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* @param retlen pointer to variable to store the number of read bytes
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* @param buf the databuffer to put data
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* @param oob_buf filesystem supplied oob data buffer
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* @param oobsel oob selection structure
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*
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* OneNAND read with ECC
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*/
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static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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size_t * retlen, u_char * buf,
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u_char * oob_buf, struct nand_oobinfo *oobsel)
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{
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struct onenand_chip *this = mtd->priv;
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int read = 0, column;
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int thislen;
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int ret = 0;
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DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n",
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(unsigned int)from, (int)len);
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/* Do not allow reads past end of device */
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if ((from + len) > mtd->size) {
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DEBUG(MTD_DEBUG_LEVEL0,
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"onenand_read_ecc: Attempt read beyond end of device\n");
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*retlen = 0;
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return -EINVAL;
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}
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/* Grab the lock and see if the device is available */
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onenand_get_device(mtd, FL_READING);
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|
|
|
while (read < len) {
|
|
thislen = min_t(int, mtd->oobblock, len - read);
|
|
|
|
column = from & (mtd->oobblock - 1);
|
|
if (column + thislen > mtd->oobblock)
|
|
thislen = mtd->oobblock - column;
|
|
|
|
if (!onenand_check_bufferram(mtd, from)) {
|
|
this->command(mtd, ONENAND_CMD_READ, from,
|
|
mtd->oobblock);
|
|
ret = this->wait(mtd, FL_READING);
|
|
/* First copy data and check return value for ECC handling */
|
|
onenand_update_bufferram(mtd, from, 1);
|
|
}
|
|
|
|
this->read_bufferram(mtd, ONENAND_DATARAM, buf, column,
|
|
thislen);
|
|
|
|
read += thislen;
|
|
if (read == len)
|
|
break;
|
|
|
|
if (ret) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_read_ecc: read failed = %d\n", ret);
|
|
break;
|
|
}
|
|
|
|
from += thislen;
|
|
buf += thislen;
|
|
}
|
|
|
|
/* Deselect and wake up anyone waiting on the device */
|
|
onenand_release_device(mtd);
|
|
|
|
/*
|
|
* Return success, if no ECC failures, else -EBADMSG
|
|
* fs driver will take care of that, because
|
|
* retlen == desired len and result == -EBADMSG
|
|
*/
|
|
*retlen = read;
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
|
|
* @param mtd MTD device structure
|
|
* @param from offset to read from
|
|
* @param len number of bytes to read
|
|
* @param retlen pointer to variable to store the number of read bytes
|
|
* @param buf the databuffer to put data
|
|
*
|
|
* This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
|
|
*/
|
|
int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
|
|
size_t * retlen, u_char * buf)
|
|
{
|
|
return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
|
|
}
|
|
|
|
/**
|
|
* onenand_read_oob - [MTD Interface] OneNAND read out-of-band
|
|
* @param mtd MTD device structure
|
|
* @param from offset to read from
|
|
* @param len number of bytes to read
|
|
* @param retlen pointer to variable to store the number of read bytes
|
|
* @param buf the databuffer to put data
|
|
*
|
|
* OneNAND read out-of-band data from the spare area
|
|
*/
|
|
int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
|
|
size_t * retlen, u_char * buf)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
int read = 0, thislen, column;
|
|
int ret = 0;
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n",
|
|
(unsigned int)from, (int)len);
|
|
|
|
/* Initialize return length value */
|
|
*retlen = 0;
|
|
|
|
/* Do not allow reads past end of device */
|
|
if (unlikely((from + len) > mtd->size)) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_read_oob: Attempt read beyond end of device\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Grab the lock and see if the device is available */
|
|
onenand_get_device(mtd, FL_READING);
|
|
|
|
column = from & (mtd->oobsize - 1);
|
|
|
|
while (read < len) {
|
|
thislen = mtd->oobsize - column;
|
|
thislen = min_t(int, thislen, len);
|
|
|
|
this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
|
|
|
|
onenand_update_bufferram(mtd, from, 0);
|
|
|
|
ret = this->wait(mtd, FL_READING);
|
|
/* First copy data and check return value for ECC handling */
|
|
|
|
this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column,
|
|
thislen);
|
|
|
|
read += thislen;
|
|
if (read == len)
|
|
break;
|
|
|
|
if (ret) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_read_oob: read failed = %d\n", ret);
|
|
break;
|
|
}
|
|
|
|
buf += thislen;
|
|
/* Read more? */
|
|
if (read < len) {
|
|
/* Page size */
|
|
from += mtd->oobblock;
|
|
column = 0;
|
|
}
|
|
}
|
|
|
|
/* Deselect and wake up anyone waiting on the device */
|
|
onenand_release_device(mtd);
|
|
|
|
*retlen = read;
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
|
|
/**
|
|
* onenand_verify_page - [GENERIC] verify the chip contents after a write
|
|
* @param mtd MTD device structure
|
|
* @param buf the databuffer to verify
|
|
* @param block block address
|
|
* @param page page address
|
|
*
|
|
* Check DataRAM area directly
|
|
*/
|
|
static int onenand_verify_page(struct mtd_info *mtd, u_char * buf,
|
|
loff_t addr, int block, int page)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
void __iomem *dataram0, *dataram1;
|
|
int ret = 0;
|
|
|
|
this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
|
|
|
|
ret = this->wait(mtd, FL_READING);
|
|
if (ret)
|
|
return ret;
|
|
|
|
onenand_update_bufferram(mtd, addr, 1);
|
|
|
|
/* Check, if the two dataram areas are same */
|
|
dataram0 = this->base + ONENAND_DATARAM;
|
|
dataram1 = dataram0 + mtd->oobblock;
|
|
|
|
if (memcmp(dataram0, dataram1, mtd->oobblock))
|
|
return -EBADMSG;
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define onenand_verify_page(...) (0)
|
|
#endif
|
|
|
|
#define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
|
|
|
|
/**
|
|
* onenand_write_ecc - [MTD Interface] OneNAND write with ECC
|
|
* @param mtd MTD device structure
|
|
* @param to offset to write to
|
|
* @param len number of bytes to write
|
|
* @param retlen pointer to variable to store the number of written bytes
|
|
* @param buf the data to write
|
|
* @param eccbuf filesystem supplied oob data buffer
|
|
* @param oobsel oob selection structure
|
|
*
|
|
* OneNAND write with ECC
|
|
*/
|
|
static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
|
|
size_t * retlen, const u_char * buf,
|
|
u_char * eccbuf, struct nand_oobinfo *oobsel)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
int written = 0;
|
|
int ret = 0;
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n",
|
|
(unsigned int)to, (int)len);
|
|
|
|
/* Initialize retlen, in case of early exit */
|
|
*retlen = 0;
|
|
|
|
/* Do not allow writes past end of device */
|
|
if (unlikely((to + len) > mtd->size)) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_write_ecc: Attempt write to past end of device\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Reject writes, which are not page aligned */
|
|
if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_write_ecc: Attempt to write not page aligned data\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Grab the lock and see if the device is available */
|
|
onenand_get_device(mtd, FL_WRITING);
|
|
|
|
/* Loop until all data write */
|
|
while (written < len) {
|
|
int thislen = min_t(int, mtd->oobblock, len - written);
|
|
|
|
this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
|
|
|
|
this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
|
|
this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
|
|
mtd->oobsize);
|
|
|
|
this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
|
|
|
|
onenand_update_bufferram(mtd, to, 1);
|
|
|
|
ret = this->wait(mtd, FL_WRITING);
|
|
if (ret) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_write_ecc: write filaed %d\n", ret);
|
|
break;
|
|
}
|
|
|
|
written += thislen;
|
|
|
|
/* Only check verify write turn on */
|
|
ret = onenand_verify_page(mtd, (u_char *) buf, to, block, page);
|
|
if (ret) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_write_ecc: verify failed %d\n", ret);
|
|
break;
|
|
}
|
|
|
|
if (written == len)
|
|
break;
|
|
|
|
to += thislen;
|
|
buf += thislen;
|
|
}
|
|
|
|
/* Deselect and wake up anyone waiting on the device */
|
|
onenand_release_device(mtd);
|
|
|
|
*retlen = written;
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* onenand_write - [MTD Interface] compability function for onenand_write_ecc
|
|
* @param mtd MTD device structure
|
|
* @param to offset to write to
|
|
* @param len number of bytes to write
|
|
* @param retlen pointer to variable to store the number of written bytes
|
|
* @param buf the data to write
|
|
*
|
|
* This function simply calls onenand_write_ecc
|
|
* with oob buffer and oobsel = NULL
|
|
*/
|
|
int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
|
|
size_t * retlen, const u_char * buf)
|
|
{
|
|
return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
|
|
}
|
|
|
|
/**
|
|
* onenand_write_oob - [MTD Interface] OneNAND write out-of-band
|
|
* @param mtd MTD device structure
|
|
* @param to offset to write to
|
|
* @param len number of bytes to write
|
|
* @param retlen pointer to variable to store the number of written bytes
|
|
* @param buf the data to write
|
|
*
|
|
* OneNAND write out-of-band
|
|
*/
|
|
int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
|
|
size_t * retlen, const u_char * buf)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
int column, status;
|
|
int written = 0;
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n",
|
|
(unsigned int)to, (int)len);
|
|
|
|
/* Initialize retlen, in case of early exit */
|
|
*retlen = 0;
|
|
|
|
/* Do not allow writes past end of device */
|
|
if (unlikely((to + len) > mtd->size)) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_write_oob: Attempt write to past end of device\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Grab the lock and see if the device is available */
|
|
onenand_get_device(mtd, FL_WRITING);
|
|
|
|
/* Loop until all data write */
|
|
while (written < len) {
|
|
int thislen = min_t(int, mtd->oobsize, len - written);
|
|
|
|
column = to & (mtd->oobsize - 1);
|
|
|
|
this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
|
|
|
|
this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
|
|
mtd->oobsize);
|
|
this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column,
|
|
thislen);
|
|
|
|
this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
|
|
|
|
onenand_update_bufferram(mtd, to, 0);
|
|
|
|
status = this->wait(mtd, FL_WRITING);
|
|
if (status)
|
|
break;
|
|
|
|
written += thislen;
|
|
if (written == len)
|
|
break;
|
|
|
|
to += thislen;
|
|
buf += thislen;
|
|
}
|
|
|
|
/* Deselect and wake up anyone waiting on the device */
|
|
onenand_release_device(mtd);
|
|
|
|
*retlen = written;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* onenand_erase - [MTD Interface] erase block(s)
|
|
* @param mtd MTD device structure
|
|
* @param instr erase instruction
|
|
*
|
|
* Erase one ore more blocks
|
|
*/
|
|
int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
unsigned int block_size;
|
|
loff_t addr;
|
|
int len;
|
|
int ret = 0;
|
|
|
|
DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
|
|
(unsigned int)instr->addr, (unsigned int)instr->len);
|
|
|
|
block_size = (1 << this->erase_shift);
|
|
|
|
/* Start address must align on block boundary */
|
|
if (unlikely(instr->addr & (block_size - 1))) {
|
|
DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Length must align on block boundary */
|
|
if (unlikely(instr->len & (block_size - 1))) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_erase: Length not block aligned\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Do not allow erase past end of device */
|
|
if (unlikely((instr->len + instr->addr) > mtd->size)) {
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_erase: Erase past end of device\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
instr->fail_addr = 0xffffffff;
|
|
|
|
/* Grab the lock and see if the device is available */
|
|
onenand_get_device(mtd, FL_ERASING);
|
|
|
|
/* Loop throught the pages */
|
|
len = instr->len;
|
|
addr = instr->addr;
|
|
|
|
instr->state = MTD_ERASING;
|
|
|
|
while (len) {
|
|
|
|
/* TODO Check badblock */
|
|
|
|
this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
|
|
|
|
ret = this->wait(mtd, FL_ERASING);
|
|
/* Check, if it is write protected */
|
|
if (ret) {
|
|
if (ret == -EPERM)
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_erase: Device is write protected!!!\n");
|
|
else
|
|
DEBUG(MTD_DEBUG_LEVEL0,
|
|
"onenand_erase: Failed erase, block %d\n",
|
|
(unsigned)(addr >> this->erase_shift));
|
|
instr->state = MTD_ERASE_FAILED;
|
|
instr->fail_addr = addr;
|
|
goto erase_exit;
|
|
}
|
|
|
|
len -= block_size;
|
|
addr += block_size;
|
|
}
|
|
|
|
instr->state = MTD_ERASE_DONE;
|
|
|
|
erase_exit:
|
|
|
|
ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
|
|
/* Do call back function */
|
|
if (!ret)
|
|
mtd_erase_callback(instr);
|
|
|
|
/* Deselect and wake up anyone waiting on the device */
|
|
onenand_release_device(mtd);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* onenand_sync - [MTD Interface] sync
|
|
* @param mtd MTD device structure
|
|
*
|
|
* Sync is actually a wait for chip ready function
|
|
*/
|
|
void onenand_sync(struct mtd_info *mtd)
|
|
{
|
|
DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
|
|
|
|
/* Grab the lock and see if the device is available */
|
|
onenand_get_device(mtd, FL_SYNCING);
|
|
|
|
/* Release it and go back */
|
|
onenand_release_device(mtd);
|
|
}
|
|
|
|
/**
|
|
* onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
|
|
* @param mtd MTD device structure
|
|
* @param ofs offset relative to mtd start
|
|
*/
|
|
int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
|
|
{
|
|
/*
|
|
* TODO
|
|
* 1. Bad block table (BBT)
|
|
* -> using NAND BBT to support JFFS2
|
|
* 2. Bad block management (BBM)
|
|
* -> bad block replace scheme
|
|
*
|
|
* Currently we do nothing
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
|
|
* @param mtd MTD device structure
|
|
* @param ofs offset relative to mtd start
|
|
*/
|
|
int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
|
|
{
|
|
/* see above */
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* onenand_unlock - [MTD Interface] Unlock block(s)
|
|
* @param mtd MTD device structure
|
|
* @param ofs offset relative to mtd start
|
|
* @param len number of bytes to unlock
|
|
*
|
|
* Unlock one or more blocks
|
|
*/
|
|
int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
int start, end, block, value, status;
|
|
|
|
start = ofs >> this->erase_shift;
|
|
end = len >> this->erase_shift;
|
|
|
|
/* Continuous lock scheme */
|
|
if (this->options & ONENAND_CONT_LOCK) {
|
|
/* Set start block address */
|
|
this->write_word(start,
|
|
this->base + ONENAND_REG_START_BLOCK_ADDRESS);
|
|
/* Set end block address */
|
|
this->write_word(end - 1,
|
|
this->base + ONENAND_REG_END_BLOCK_ADDRESS);
|
|
/* Write unlock command */
|
|
this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
|
|
|
|
/* There's no return value */
|
|
this->wait(mtd, FL_UNLOCKING);
|
|
|
|
/* Sanity check */
|
|
while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
|
|
& ONENAND_CTRL_ONGO)
|
|
continue;
|
|
|
|
/* Check lock status */
|
|
status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
|
|
if (!(status & ONENAND_WP_US))
|
|
printk(KERN_ERR "wp status = 0x%x\n", status);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Block lock scheme */
|
|
for (block = start; block < end; block++) {
|
|
/* Set start block address */
|
|
this->write_word(block,
|
|
this->base + ONENAND_REG_START_BLOCK_ADDRESS);
|
|
/* Write unlock command */
|
|
this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
|
|
|
|
/* There's no return value */
|
|
this->wait(mtd, FL_UNLOCKING);
|
|
|
|
/* Sanity check */
|
|
while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
|
|
& ONENAND_CTRL_ONGO)
|
|
continue;
|
|
|
|
/* Set block address for read block status */
|
|
value = onenand_block_address(this->device_id, block);
|
|
this->write_word(value,
|
|
this->base + ONENAND_REG_START_ADDRESS1);
|
|
|
|
/* Check lock status */
|
|
status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
|
|
if (!(status & ONENAND_WP_US))
|
|
printk(KERN_ERR "block = %d, wp status = 0x%x\n",
|
|
block, status);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* onenand_print_device_info - Print device ID
|
|
* @param device device ID
|
|
*
|
|
* Print device ID
|
|
*/
|
|
void onenand_print_device_info(int device, int verbose)
|
|
{
|
|
int vcc, demuxed, ddp, density;
|
|
|
|
if (!verbose)
|
|
return;
|
|
|
|
vcc = device & ONENAND_DEVICE_VCC_MASK;
|
|
demuxed = device & ONENAND_DEVICE_IS_DEMUX;
|
|
ddp = device & ONENAND_DEVICE_IS_DDP;
|
|
density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
|
|
printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
|
|
demuxed ? "" : "Muxed ",
|
|
ddp ? "(DDP)" : "",
|
|
(16 << density), vcc ? "2.65/3.3" : "1.8", device);
|
|
}
|
|
|
|
static const struct onenand_manufacturers onenand_manuf_ids[] = {
|
|
{ONENAND_MFR_SAMSUNG, "Samsung"},
|
|
{ONENAND_MFR_UNKNOWN, "Unknown"}
|
|
};
|
|
|
|
/**
|
|
* onenand_check_maf - Check manufacturer ID
|
|
* @param manuf manufacturer ID
|
|
*
|
|
* Check manufacturer ID
|
|
*/
|
|
static int onenand_check_maf(int manuf)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; onenand_manuf_ids[i].id; i++) {
|
|
if (manuf == onenand_manuf_ids[i].id)
|
|
break;
|
|
}
|
|
|
|
#ifdef ONENAND_DEBUG
|
|
printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
|
|
onenand_manuf_ids[i].name, manuf);
|
|
#endif
|
|
|
|
return (i != ONENAND_MFR_UNKNOWN);
|
|
}
|
|
|
|
/**
|
|
* onenand_probe - [OneNAND Interface] Probe the OneNAND device
|
|
* @param mtd MTD device structure
|
|
*
|
|
* OneNAND detection method:
|
|
* Compare the the values from command with ones from register
|
|
*/
|
|
static int onenand_probe(struct mtd_info *mtd)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
int bram_maf_id, bram_dev_id, maf_id, dev_id;
|
|
int version_id;
|
|
int density;
|
|
|
|
/* Send the command for reading device ID from BootRAM */
|
|
this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
|
|
|
|
/* Read manufacturer and device IDs from BootRAM */
|
|
bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
|
|
bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
|
|
|
|
/* Check manufacturer ID */
|
|
if (onenand_check_maf(bram_maf_id))
|
|
return -ENXIO;
|
|
|
|
/* Reset OneNAND to read default register values */
|
|
this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
|
|
|
|
{
|
|
int i;
|
|
for (i = 0; i < 10000; i++) ;
|
|
}
|
|
|
|
/* Read manufacturer and device IDs from Register */
|
|
maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
|
|
dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
|
|
|
|
/* Check OneNAND device */
|
|
if (maf_id != bram_maf_id || dev_id != bram_dev_id)
|
|
return -ENXIO;
|
|
|
|
/* Flash device information */
|
|
onenand_print_device_info(dev_id, 0);
|
|
this->device_id = dev_id;
|
|
|
|
density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
|
|
this->chipsize = (16 << density) << 20;
|
|
|
|
/* OneNAND page size & block size */
|
|
/* The data buffer size is equal to page size */
|
|
mtd->oobblock =
|
|
this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
|
|
mtd->oobsize = mtd->oobblock >> 5;
|
|
/* Pagers per block is always 64 in OneNAND */
|
|
mtd->erasesize = mtd->oobblock << 6;
|
|
|
|
this->erase_shift = ffs(mtd->erasesize) - 1;
|
|
this->page_shift = ffs(mtd->oobblock) - 1;
|
|
this->ppb_shift = (this->erase_shift - this->page_shift);
|
|
this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
|
|
|
|
/* REVIST: Multichip handling */
|
|
|
|
mtd->size = this->chipsize;
|
|
|
|
/* Version ID */
|
|
version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
|
|
#ifdef ONENAND_DEBUG
|
|
printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
|
|
#endif
|
|
|
|
/* Lock scheme */
|
|
if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
|
|
!(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
|
|
printk(KERN_INFO "Lock scheme is Continues Lock\n");
|
|
this->options |= ONENAND_CONT_LOCK;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* onenand_scan - [OneNAND Interface] Scan for the OneNAND device
|
|
* @param mtd MTD device structure
|
|
* @param maxchips Number of chips to scan for
|
|
*
|
|
* This fills out all the not initialized function pointers
|
|
* with the defaults.
|
|
* The flash ID is read and the mtd/chip structures are
|
|
* filled with the appropriate values.
|
|
*/
|
|
int onenand_scan(struct mtd_info *mtd, int maxchips)
|
|
{
|
|
struct onenand_chip *this = mtd->priv;
|
|
|
|
if (!this->read_word)
|
|
this->read_word = onenand_readw;
|
|
if (!this->write_word)
|
|
this->write_word = onenand_writew;
|
|
|
|
if (!this->command)
|
|
this->command = onenand_command;
|
|
if (!this->wait)
|
|
this->wait = onenand_wait;
|
|
|
|
if (!this->read_bufferram)
|
|
this->read_bufferram = onenand_read_bufferram;
|
|
if (!this->write_bufferram)
|
|
this->write_bufferram = onenand_write_bufferram;
|
|
|
|
if (onenand_probe(mtd))
|
|
return -ENXIO;
|
|
|
|
/* Set Sync. Burst Read after probing */
|
|
if (this->mmcontrol) {
|
|
printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
|
|
this->read_bufferram = onenand_sync_read_bufferram;
|
|
}
|
|
|
|
onenand_unlock(mtd, 0, mtd->size);
|
|
|
|
return onenand_default_bbt(mtd);
|
|
}
|
|
|
|
/**
|
|
* onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
|
|
* @param mtd MTD device structure
|
|
*/
|
|
void onenand_release(struct mtd_info *mtd)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* OneNAND initialization at U-Boot
|
|
*/
|
|
struct mtd_info onenand_mtd;
|
|
struct onenand_chip onenand_chip;
|
|
|
|
void onenand_init(void)
|
|
{
|
|
memset(&onenand_mtd, 0, sizeof(struct mtd_info));
|
|
memset(&onenand_chip, 0, sizeof(struct onenand_chip));
|
|
|
|
onenand_chip.base = (void *)CFG_ONENAND_BASE;
|
|
onenand_mtd.priv = &onenand_chip;
|
|
|
|
onenand_scan(&onenand_mtd, 1);
|
|
|
|
puts("OneNAND: ");
|
|
print_size(onenand_mtd.size, "\n");
|
|
}
|
|
|
|
#endif /* CONFIG_CMD_ONENAND */
|