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https://github.com/brain-hackers/u-boot-brain
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877bfe37dc
This patch introduces the support for Keymile's kmp204x reference design. This design is based on Freescale's P2040/P2041 SoC. The peripherals used by this design are: - DDR3 RAM with SPD support - SPI NOR Flash as boot medium - NAND Flash - 2 PCIe busses (hosts 1 and 3) - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5) - 3 Local Bus windows, with one dedicated to the QRIO reset/power mgmt FPGA - 2 HW I2C busses - last but not least, the mandatory serial port The board/keymile/kmp204x code is mostly based on Freescale's P2041rdb support and was changed according to our design (that means essentially removing what is not present on the designs and a few adaptations). There is currently only one prototype board that is based on this design and this patch also introduces it. The board is called kmlion1. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> kmp204x: update the ENV #define The comments had to be refined as well as the total size Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> [York Sun: fix ddr.c] Acked-by: York Sun <yorksun@freescale.com>
36 lines
765 B
INI
36 lines
765 B
INI
#
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# Copyright 2012 Freescale Semiconductor, Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Refer docs/README.pblimage for more details about how-to configure
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# and create PBL boot image
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#
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#PBI commands
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#Initialize CPC1 as 1MB SRAM
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09010000 00200400
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09138000 00000000
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091380c0 00000100
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09010100 00000000
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09010104 fff0000b
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09010f00 08000000
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09010000 80000000
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#Configure LAW for CPC1
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09000d00 00000000
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09000d04 fff00000
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09000d08 81000013
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09000010 00000000
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09000014 ff000000
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09000018 81000000
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#Initialize eSPI controller, default configuration is slow for eSPI to
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#load data, this configuration comes from u-boot eSPI driver.
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09110000 80000403
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09110020 27170008
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09110024 00100008
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09110028 00100008
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0911002c 00100008
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#Flush PBL data
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09138000 00000000
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091380c0 00000000
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