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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
219 lines
5.1 KiB
C
219 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* From Coreboot
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*
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* Copyright (C) 2001 Ronald G. Minnich
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* Copyright (C) 2005 Nick.Barker9@btinternet.com
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* Copyright (C) 2007-2009 coresystems GmbH
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*/
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#include <common.h>
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#include <asm/pci.h>
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#include "bios_emul.h"
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/* errors go in AH. Just set these up so that word assigns will work */
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enum {
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PCIBIOS_SUCCESSFUL = 0x0000,
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PCIBIOS_UNSUPPORTED = 0x8100,
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PCIBIOS_BADVENDOR = 0x8300,
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PCIBIOS_NODEV = 0x8600,
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PCIBIOS_BADREG = 0x8700
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};
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int int10_handler(void)
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{
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static u8 cursor_row, cursor_col;
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int res = 0;
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switch ((M.x86.R_EAX & 0xff00) >> 8) {
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case 0x01: /* Set cursor shape */
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res = 1;
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break;
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case 0x02: /* Set cursor position */
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if (cursor_row != ((M.x86.R_EDX >> 8) & 0xff) ||
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cursor_col >= (M.x86.R_EDX & 0xff)) {
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debug("\n");
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}
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cursor_row = (M.x86.R_EDX >> 8) & 0xff;
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cursor_col = M.x86.R_EDX & 0xff;
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res = 1;
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break;
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case 0x03: /* Get cursor position */
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M.x86.R_EAX &= 0x00ff;
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M.x86.R_ECX = 0x0607;
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M.x86.R_EDX = (cursor_row << 8) | cursor_col;
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res = 1;
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break;
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case 0x06: /* Scroll up */
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debug("\n");
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res = 1;
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break;
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case 0x08: /* Get Character and Mode at Cursor Position */
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M.x86.R_EAX = 0x0f00 | 'A'; /* White on black 'A' */
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res = 1;
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break;
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case 0x09: /* Write Character and attribute */
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case 0x0e: /* Write Character */
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debug("%c", M.x86.R_EAX & 0xff);
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res = 1;
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break;
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case 0x0f: /* Get video mode */
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M.x86.R_EAX = 0x5002; /*80 x 25 */
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M.x86.R_EBX &= 0x00ff;
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res = 1;
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break;
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default:
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printf("Unknown INT10 function %04x\n", M.x86.R_EAX & 0xffff);
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break;
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}
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return res;
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}
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int int12_handler(void)
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{
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M.x86.R_EAX = 64 * 1024;
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return 1;
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}
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int int16_handler(void)
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{
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int res = 0;
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switch ((M.x86.R_EAX & 0xff00) >> 8) {
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case 0x00: /* Check for Keystroke */
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M.x86.R_EAX = 0x6120; /* Space Bar, Space */
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res = 1;
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break;
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case 0x01: /* Check for Keystroke */
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M.x86.R_EFLG |= 1 << 6; /* Zero Flag set (no key available) */
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res = 1;
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break;
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default:
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printf("Unknown INT16 function %04x\n", M.x86.R_EAX & 0xffff);
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break;
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}
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return res;
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}
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#define PCI_CONFIG_SPACE_TYPE1 (1 << 0)
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#define PCI_SPECIAL_CYCLE_TYPE1 (1 << 4)
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int int1a_handler(void)
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{
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unsigned short func = (unsigned short)M.x86.R_EAX;
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int retval = 1;
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unsigned short devid, vendorid, devfn;
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struct udevice *dev;
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/* Use short to get rid of gabage in upper half of 32-bit register */
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short devindex;
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unsigned char bus;
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pci_dev_t bdf;
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u32 dword;
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u16 word;
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u8 byte, reg;
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int ret;
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switch (func) {
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case 0xb101: /* PCIBIOS Check */
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M.x86.R_EDX = 0x20494350; /* ' ICP' */
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M.x86.R_EAX &= 0xffff0000; /* Clear AH / AL */
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M.x86.R_EAX |= PCI_CONFIG_SPACE_TYPE1 |
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PCI_SPECIAL_CYCLE_TYPE1;
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/*
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* last bus in the system. Hard code to 255 for now.
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* dev_enumerate() does not seem to tell us (publically)
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*/
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M.x86.R_ECX = 0xff;
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M.x86.R_EDI = 0x00000000; /* protected mode entry */
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retval = 1;
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break;
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case 0xb102: /* Find Device */
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devid = M.x86.R_ECX;
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vendorid = M.x86.R_EDX;
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devindex = M.x86.R_ESI;
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bdf = -1;
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ret = dm_pci_find_device(vendorid, devid, devindex, &dev);
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if (!ret) {
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unsigned short busdevfn;
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bdf = dm_pci_get_bdf(dev);
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M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
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M.x86.R_EAX |= PCIBIOS_SUCCESSFUL;
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/*
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* busnum is an unsigned char;
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* devfn is an int, so we mask it off.
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*/
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busdevfn = (PCI_BUS(bdf) << 8) | PCI_DEV(bdf) << 3 |
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PCI_FUNC(bdf);
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debug("0x%x: return 0x%x\n", func, busdevfn);
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M.x86.R_EBX = busdevfn;
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retval = 1;
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} else {
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M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
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M.x86.R_EAX |= PCIBIOS_NODEV;
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retval = 0;
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}
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break;
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case 0xb10a: /* Read Config Dword */
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case 0xb109: /* Read Config Word */
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case 0xb108: /* Read Config Byte */
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case 0xb10d: /* Write Config Dword */
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case 0xb10c: /* Write Config Word */
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case 0xb10b: /* Write Config Byte */
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devfn = M.x86.R_EBX & 0xff;
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bus = M.x86.R_EBX >> 8;
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reg = M.x86.R_EDI;
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bdf = PCI_BDF(bus, devfn >> 3, devfn & 7);
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ret = dm_pci_bus_find_bdf(bdf, &dev);
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if (ret) {
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debug("%s: Device %x not found\n", __func__, bdf);
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break;
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}
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switch (func) {
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case 0xb108: /* Read Config Byte */
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dm_pci_read_config8(dev, reg, &byte);
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M.x86.R_ECX = byte;
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break;
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case 0xb109: /* Read Config Word */
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dm_pci_read_config16(dev, reg, &word);
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M.x86.R_ECX = word;
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break;
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case 0xb10a: /* Read Config Dword */
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dm_pci_read_config32(dev, reg, &dword);
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M.x86.R_ECX = dword;
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break;
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case 0xb10b: /* Write Config Byte */
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byte = M.x86.R_ECX;
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dm_pci_write_config8(dev, reg, byte);
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break;
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case 0xb10c: /* Write Config Word */
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word = M.x86.R_ECX;
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dm_pci_write_config16(dev, reg, word);
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break;
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case 0xb10d: /* Write Config Dword */
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dword = M.x86.R_ECX;
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dm_pci_write_config32(dev, reg, dword);
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break;
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}
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#ifdef CONFIG_REALMODE_DEBUG
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debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n", func,
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bus, devfn, reg, M.x86.R_ECX);
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#endif
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M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
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M.x86.R_EAX |= PCIBIOS_SUCCESSFUL;
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retval = 1;
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break;
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default:
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printf("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
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M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
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M.x86.R_EAX |= PCIBIOS_UNSUPPORTED;
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retval = 0;
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break;
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}
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return retval;
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}
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