mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
148 lines
4.1 KiB
C
148 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Common board functions for siemens AT91SAM9G45 based boards
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* (C) Copyright 2013 Siemens AG
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*
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* Based on:
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* U-Boot file: include/configs/at91sam9m10g45ek.h
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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#include <linux/sizes.h>
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/*
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* Warning: changing CONFIG_SYS_TEXT_BASE requires
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* adapting the initial boot program.
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* Since the linker has to swallow that define, we must use a pure
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* hex number here!
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*/
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
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/* general purpose I/O */
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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#define CONFIG_AT91_GPIO
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#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
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/* serial console */
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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/* LED */
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#define CONFIG_AT91_LED
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#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
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#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
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#define CONFIG_SYS_SDRAM_SIZE 0x08000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + SZ_32K - GENERATED_GBL_DATA_SIZE)
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
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#endif
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_AT91_WANTS_COMMON_PHY
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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/* DFU class support */
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
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#define DFU_MANIFEST_POLL_TIMEOUT 25000
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#define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6
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/* bootstrap + u-boot + env in nandflash */
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#define CONFIG_ENV_OFFSET 0x100000
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#define CONFIG_ENV_OFFSET_REDUND 0x180000
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#define CONFIG_ENV_SIZE SZ_128K
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#define CONFIG_BOOTCOMMAND \
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"nand read 0x70000000 0x200000 0x300000;" \
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"bootm 0x70000000"
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
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SZ_4M, 0x1000)
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/* Defines for SPL */
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#define CONFIG_SPL_TEXT_BASE 0x300000
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#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K)
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#define CONFIG_SPL_STACK (SZ_16K)
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#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
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#define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K)
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SPL_NAND_RAW_ONLY
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#define CONFIG_SPL_NAND_SOFTECC
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
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#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
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48, 49, 50, 51, 52, 53, 54, 55, \
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56, 57, 58, 59, 60, 61, 62, 63, }
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#define CONFIG_SPL_ATMEL_SIZE
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#define CONFIG_SYS_MASTER_CLOCK 132096000
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#define AT91_PLL_LOCK_TIMEOUT 1000000
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#define CONFIG_SYS_AT91_PLLA 0x20c73f03
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#define CONFIG_SYS_MCKR 0x1301
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#define CONFIG_SYS_MCKR_CSS 0x1302
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#endif
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