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https://github.com/brain-hackers/u-boot-brain
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85b8c5c4bf
Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
330 lines
9.3 KiB
C
330 lines
9.3 KiB
C
/*
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* (C) Copyright 2011 CompuLab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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* Igor Grinberg <grinberg@compulab.co.il>
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*
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* Based on omap3_beagle.h
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* (C) Copyright 2006-2008
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* Texas Instruments.
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <x0khasim@ti.com>
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*
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* Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_OMAP /* in a TI OMAP core */
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#define CONFIG_OMAP34XX /* which is a 34XX */
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#define CONFIG_OMAP_GPIO
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#define CONFIG_CMD_GPIO
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#define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */
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#define CONFIG_OMAP_COMMON
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#define CONFIG_SYS_TEXT_BASE 0x80008000
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#define CONFIG_SDRC /* The chip has SDRC controller */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <asm/arch/omap3.h>
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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#define CONFIG_MISC_INIT_R
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#define CONFIG_OF_LIBFDT 1
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/*
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* The early kernel mapping on ARM currently only maps from the base of DRAM
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* to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
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* The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
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* so that leaves DRAM base to DRAM base + 0x4000 available.
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*/
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#define CONFIG_SYS_BOOTMAPSZ 0x4000
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SERIAL_TAG
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
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/* Sector */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
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/*
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* Hardware drivers
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*/
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/*
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* NS16550 Configuration
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*/
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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/*
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* select serial console configuration
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*/
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#define CONFIG_CONS_INDEX 3
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#define CONFIG_SERIAL3 3 /* UART3 */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
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115200}
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_DOS_PARTITION
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/* USB */
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#define CONFIG_USB_OMAP3
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_OMAP
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#define CONFIG_USB_ULPI
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#define CONFIG_USB_ULPI_VIEWPORT_OMAP
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#define CONFIG_USB_STORAGE
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#define CONFIG_MUSB_UDC
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#define CONFIG_TWL4030_USB
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#define CONFIG_CMD_USB
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/* USB device configuration */
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#define CONFIG_USB_DEVICE
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#define CONFIG_USB_TTY
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_EXT2 /* EXT2 Support */
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#define CONFIG_CMD_FAT /* FAT support */
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#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nand0=nand"
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#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
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"1920k(u-boot),256k(u-boot-env),"\
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"4m(kernel),-(fs)"
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#define CONFIG_CMD_I2C /* I2C serial bus support */
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#define CONFIG_CMD_MMC /* MMC support */
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#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PING
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
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#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
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#undef CONFIG_CMD_IMLS /* List all found images */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_DRIVER_OMAP34XX_I2C
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_I2C_MULTI_BUS
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/*
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* TWL4030
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*/
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#define CONFIG_TWL4030_POWER
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#define CONFIG_TWL4030_LED
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/*
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* Board NAND Info.
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*/
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#define CONFIG_SYS_NAND_QUIET_TEST
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
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/* to access nand */
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#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
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/* to access nand at */
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/* CS0 */
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#define GPMC_NAND_ECC_LP_x8_LAYOUT
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
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/* devices */
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/* Environment information */
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x82000000\0" \
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"usbtty=cdc_acm\0" \
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"console=ttyS2,115200n8\0" \
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"mpurate=500\0" \
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"vram=12M\0" \
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"dvimode=1024x768MR-16@60\0" \
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"defaultdisplay=dvi\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 rw\0" \
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"mmcrootfstype=ext4 rootwait\0" \
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"nandroot=/dev/mtdblock4 rw\0" \
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"nandrootfstype=ubifs\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"mpurate=${mpurate} " \
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"vram=${vram} " \
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"omapfb.mode=dvi:${dvimode} " \
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"omapfb.debug=y " \
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"omapdss.def_disp=${defaultdisplay} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"nandargs=setenv bootargs console=${console} " \
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"mpurate=${mpurate} " \
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"vram=${vram} " \
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"omapfb.mode=dvi:${dvimode} " \
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"omapfb.debug=y " \
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"omapdss.def_disp=${defaultdisplay} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype}\0" \
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"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source ${loadaddr}\0" \
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"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootm ${loadaddr}\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${loadaddr} 2a0000 400000; " \
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"bootm ${loadaddr}\0" \
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loaduimage; then " \
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"run mmcboot; " \
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"else run nandboot; " \
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"fi; " \
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"fi; " \
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"else run nandboot; fi"
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_TIMESTAMP
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#define CONFIG_SYS_AUTOLOAD "no"
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "CM-T3x # "
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
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/* works on */
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
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0x01F00000) /* 31MB */
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
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/* load address */
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/* **** PISMO SUPPORT *** */
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/* Configure the PISMO */
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#define PISMO1_NAND_SIZE GPMC_SIZE_128M
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/* Monitor at start of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
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#define CONFIG_ENV_IS_IN_NAND
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#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
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#if defined(CONFIG_CMD_NET)
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_32_BIT
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#define CM_T3X_SMC911X_BASE 0x2C000000
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#define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20))
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#define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE
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#endif /* (CONFIG_CMD_NET) */
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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/* Status LED */
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#define CONFIG_STATUS_LED /* Status LED enabled */
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#define CONFIG_BOARD_SPECIFIC_LED
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#define STATUS_LED_GREEN 0
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#define STATUS_LED_BIT STATUS_LED_GREEN
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#define STATUS_LED_STATE STATUS_LED_ON
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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#define STATUS_LED_BOOT STATUS_LED_BIT
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#define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */
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#define CONFIG_SPLASHIMAGE_GUARD
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/* GPIO banks */
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#ifdef CONFIG_STATUS_LED
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#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
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#endif
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/* Display Configuration */
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#define CONFIG_OMAP3_GPIO_2
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#define CONFIG_VIDEO_OMAP3
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#define LCD_BPP LCD_COLOR16
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#define CONFIG_LCD
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#endif /* __CONFIG_H */
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