mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-21 18:39:43 +09:00
85a3cfb80a
RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU. It supports two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-16MB range. Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error: Signed-off-by: Simon Glass <sjg@chromium.org>
33 lines
937 B
Makefile
33 lines
937 B
Makefile
#
|
|
# Copyright (c) 2014 Google, Inc
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
ifdef CONFIG_TPL_BUILD
|
|
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
|
|
obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
|
|
else ifdef CONFIG_SPL_BUILD
|
|
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
|
|
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
|
|
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
|
|
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o
|
|
obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
|
|
else
|
|
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
|
|
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
|
|
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
|
|
endif
|
|
ifndef CONFIG_ARM64
|
|
obj-y += rk_timer.o
|
|
endif
|
|
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
|
|
|
|
ifndef CONFIG_TPL_BUILD
|
|
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
|
|
endif
|
|
|
|
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
|
|
obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
|
|
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
|