mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 04:36:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
105 lines
2.2 KiB
ArmAsm
105 lines
2.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <config.h>
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#include <asm/pci.h>
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#include <asm/post.h>
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#include <asm/arch/quark.h>
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#include <asm/arch/msg_port.h>
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.globl car_init
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car_init:
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post_code(POST_CAR_START)
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/*
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* Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is
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* initialized by hardware. eSRAM is the ideal place to be used
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* for Cache-As-RAM (CAR) before system memory is available.
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*
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* Relocate this eSRAM to a suitable location in the physical
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* memory map and enable it.
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*/
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/* Host Memory Bound Register P03h:R08h */
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mov $((MSG_PORT_HOST_BRIDGE << 16) | (HM_BOUND << 8)), %eax
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mov $(DRAM_BASE + DRAM_MAX_SIZE + ESRAM_SIZE), %edx
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lea 1f, %esp
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jmp msg_port_write
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1:
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/* eSRAM Block Page Control Register P05h:R82h */
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mov $((MSG_PORT_MEM_MGR << 16) | (ESRAM_BLK_CTRL << 8)), %eax
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mov $(ESRAM_BLOCK_MODE | (CONFIG_ESRAM_BASE >> 24)), %edx
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lea 2f, %esp
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jmp msg_port_write
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2:
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post_code(POST_CAR_CPU_CACHE)
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jmp car_init_ret
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msg_port_read:
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/*
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* Parameter:
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* eax[23:16] - Message Port ID
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* eax[15:08] - Register Address
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*
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* Return Value:
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* eax - Message Port Register value
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*
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* Return Address: esp
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*/
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or $((MSG_OP_READ << 24) | MSG_BYTE_ENABLE), %eax
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mov %eax, %ebx
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/* Write MCR B0:D0:F0:RD0 */
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mov $(PCI_CFG_EN | MSG_CTRL_REG), %eax
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mov $PCI_REG_ADDR, %dx
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out %eax, %dx
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mov $PCI_REG_DATA, %dx
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mov %ebx, %eax
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out %eax, %dx
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/* Read MDR B0:D0:F0:RD4 */
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mov $(PCI_CFG_EN | MSG_DATA_REG), %eax
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mov $PCI_REG_ADDR, %dx
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out %eax, %dx
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mov $PCI_REG_DATA, %dx
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in %dx, %eax
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jmp *%esp
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msg_port_write:
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/*
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* Parameter:
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* eax[23:16] - Message Port ID
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* eax[15:08] - Register Address
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* edx - Message Port Register value to write
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*
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* Return Address: esp
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*/
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or $((MSG_OP_WRITE << 24) | MSG_BYTE_ENABLE), %eax
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mov %eax, %esi
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mov %edx, %edi
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/* Write MDR B0:D0:F0:RD4 */
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mov $(PCI_CFG_EN | MSG_DATA_REG), %eax
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mov $PCI_REG_ADDR, %dx
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out %eax, %dx
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mov $PCI_REG_DATA, %dx
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mov %edi, %eax
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out %eax, %dx
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/* Write MCR B0:D0:F0:RD0 */
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mov $(PCI_CFG_EN | MSG_CTRL_REG), %eax
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mov $PCI_REG_ADDR, %dx
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out %eax, %dx
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mov $PCI_REG_DATA, %dx
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mov %esi, %eax
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out %eax, %dx
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jmp *%esp
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