mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
67 lines
2.1 KiB
C
67 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Special Function Register (SFR)
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*
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* Copyright (C) 2014 Atmel
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* Bo Shen <voice.shen@atmel.com>
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*/
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#ifndef __SAMA5_SFR_H
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#define __SAMA5_SFR_H
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struct atmel_sfr {
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u32 reserved1; /* 0x00 */
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u32 ddrcfg; /* 0x04: DDR Configuration Register */
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u32 reserved2; /* 0x08 */
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u32 reserved3; /* 0x0c */
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u32 ohciicr; /* 0x10: OHCI Interrupt Configuration Register */
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u32 ohciisr; /* 0x14: OHCI Interrupt Status Register */
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u32 reserved4[4]; /* 0x18 ~ 0x24 */
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u32 secure; /* 0x28: Security Configuration Register */
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u32 reserved5[5]; /* 0x2c ~ 0x3c */
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u32 ebicfg; /* 0x40: EBI Configuration Register */
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u32 reserved6[2]; /* 0x44 ~ 0x48 */
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u32 sn0; /* 0x4c */
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u32 sn1; /* 0x50 */
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u32 aicredir; /* 0x54 */
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u32 l2cc_hramc; /* 0x58 */
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};
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/* Register Mapping*/
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#define AT91_SFR_UTMICKTRIM 0x30 /* UTMI Clock Trimming Register */
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/* Bit field in DDRCFG */
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#define ATMEL_SFR_DDRCFG_FDQIEN 0x00010000
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#define ATMEL_SFR_DDRCFG_FDQSIEN 0x00020000
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/* Bit field in EBICFG */
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#define AT91_SFR_EBICFG_DRIVE0 (0x3 << 0)
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#define AT91_SFR_EBICFG_DRIVE0_LOW (0x0 << 0)
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#define AT91_SFR_EBICFG_DRIVE0_MEDIUM (0x2 << 0)
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#define AT91_SFR_EBICFG_DRIVE0_HIGH (0x3 << 0)
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#define AT91_SFR_EBICFG_PULL0 (0x3 << 2)
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#define AT91_SFR_EBICFG_PULL0_UP (0x0 << 2)
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#define AT91_SFR_EBICFG_PULL0_NONE (0x1 << 2)
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#define AT91_SFR_EBICFG_PULL0_DOWN (0x3 << 2)
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#define AT91_SFR_EBICFG_SCH0 (0x1 << 4)
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#define AT91_SFR_EBICFG_SCH0_OFF (0x0 << 4)
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#define AT91_SFR_EBICFG_SCH0_ON (0x1 << 4)
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#define AT91_SFR_EBICFG_DRIVE1 (0x3 << 8)
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#define AT91_SFR_EBICFG_DRIVE1_LOW (0x0 << 8)
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#define AT91_SFR_EBICFG_DRIVE1_MEDIUM (0x2 << 8)
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#define AT91_SFR_EBICFG_DRIVE1_HIGH (0x3 << 8)
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#define AT91_SFR_EBICFG_PULL1 (0x3 << 10)
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#define AT91_SFR_EBICFG_PULL1_UP (0x0 << 10)
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#define AT91_SFR_EBICFG_PULL1_NONE (0x1 << 10)
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#define AT91_SFR_EBICFG_PULL1_DOWN (0x3 << 10)
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#define AT91_SFR_EBICFG_SCH1 (0x1 << 12)
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#define AT91_SFR_EBICFG_SCH1_OFF (0x0 << 12)
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#define AT91_SFR_EBICFG_SCH1_ON (0x1 << 12)
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#define AT91_UTMICKTRIM_FREQ GENMASK(1, 0)
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/* Bit field in AICREDIR */
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#define ATMEL_SFR_AICREDIR_NSAIC 0x00000001
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#endif
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