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![Peng Fan](/assets/img/avatar_default.png)
Introduce DDR driver for i.MX8M. The driver will be used by SPL to initialze DDR PHY and DDR Controller. Signed-off-by: Peng Fan <peng.fan@nxp.com>
23 lines
540 B
Plaintext
23 lines
540 B
Plaintext
config IMX8M_DRAM
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bool "imx8m dram"
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config IMX8M_LPDDR4
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bool "imx8m lpddr4"
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select IMX8M_DRAM
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help
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Select the i.MX8M LPDDR4 driver support on i.MX8M SOC.
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config IMX8M_DDR4
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bool "imx8m ddr4"
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select IMX8M_DRAM
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help
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Select the i.MX8M DDR4 driver support on i.MX8M SOC.
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config SAVED_DRAM_TIMING_BASE
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hex "Define the base address for saved dram timing"
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help
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after DRAM is trained, need to save the dram related timming
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info into memory for low power use. OCRAM_S is used for this
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purpose on i.MX8MM.
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default 0x180000
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