Gabe Black 82e73f0e3d x86: coreboot: Implement recursively scanning PCI busses ... A hook is installed to configure PCI bus bridges as they encountered by u-boot. The hook extracts the secondary bus number from the bridge's config space and then recursively scans that bus. On Coreboot, the PCI bus address space has identity mapping with the physical address space, so declare it as such to ensure that the "pci_map_bar" function used by some PCI drivers is behaving properly. This fixes the EHCI PCI driver initialization on Stumpy. This was tested as follows: Ran the PCI command on Alex, saw devices on bus 0, the OXPCIe 952 on bus 1, and empty busses 2 through 5. This matches the bridges reported on bus 0 and the PCI configuration output from coreboot. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>		2012-11-28 11:40:05 -08:00
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coreboot	x86: coreboot: Implement recursively scanning PCI busses	2012-11-28 11:40:05 -08:00
sc520	sc520: fix build warning about unused temp var	2012-03-06 21:05:18 +11:00
config.mk	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
cpu.c	x86: Put global data on the stack	2012-11-28 11:40:03 -08:00
interrupts.c	x86: Tweak IDT and GDT for alignment and readability	2012-01-04 22:29:40 +11:00
Makefile	x86: Allow excluding reset vector code from u-boot	2012-11-28 11:40:03 -08:00
resetvec.S	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
start16.S	x86: Tweak IDT and GDT for alignment and readability	2012-01-04 22:29:40 +11:00
start.S	x86: Put global data on the stack	2012-11-28 11:40:03 -08:00
u-boot.lds	x86: Allow excluding reset vector code from u-boot	2012-11-28 11:40:03 -08:00