mirror of
https://github.com/brain-hackers/u-boot-brain
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fe1c3cd3af
There is no reasonably robust way (this will be needed so early that diagnostics will be limited) to specify the base-address of the secure timer through the DTS for TPL and SPL. In order to allow us a cleaner way to structure our SPL and TPL stage, we now move to a DM timer driver. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
52 lines
1.0 KiB
Plaintext
52 lines
1.0 KiB
Plaintext
/*
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* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
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*
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* Minimal dts for a SPL FIT image payload.
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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/ {
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description = "FIT image with U-Boot proper, ATF bl31, DTB";
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#address-cells = <1>;
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images {
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uboot {
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description = "U-Boot (64-bit)";
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data = /incbin/("../../../u-boot-nodtb.bin");
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type = "standalone";
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arch = "arm64";
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compression = "none";
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load = <0x00200000>;
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};
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atf {
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description = "ARM Trusted Firmware";
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data = /incbin/("../../../bl31-rk3368.bin");
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type = "firmware";
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arch = "arm64";
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compression = "none";
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load = <0x00010000>;
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entry = <0x00010000>;
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};
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fdt {
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description = "RK3368-uQ7 (Lion) flat device-tree";
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data = /incbin/("../../../u-boot.dtb");
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type = "flat_dt";
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compression = "none";
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};
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};
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configurations {
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default = "conf";
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conf {
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description = "Theobroma Systems RK3368-uQ7 (Puma) SoM";
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firmware = "uboot";
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loadables = "atf";
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fdt = "fdt";
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};
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};
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};
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