mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-06 03:20:41 +09:00
82a8a93327
There are two versions of imx6ul pico SOMs: one with 256MB and another one with 512MB of RAM. Convert to SPL so that both versions can be supported. This patch doesn't rework the clock initialization to avoid changing the behavior in this same patch, so it will be cleaned up in future. Currently only the 256MB is tested/supported. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
123 lines
3.2 KiB
C
123 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015 Technexion Ltd.
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*
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* Configuration settings for the Technexion PICO-IMX6UL-EMMC board.
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*/
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#ifndef __PICO_IMX6UL_CONFIG_H
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#define __PICO_IMX6UL_CONFIG_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#include "mx6_common.h"
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#include <asm/mach-imx/gpio.h>
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#include "imx6_spl.h"
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/* Network support */
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE ENET2_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1
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#define CONFIG_FEC_XCV_TYPE RMII
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART6_BASE_ADDR
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/* MMC Configs */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
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#define CONFIG_SUPPORT_EMMC_BOOT
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_USBD_HS
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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#define CONFIG_DFU_ENV_SETTINGS \
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"dfu_alt_info=uboot raw 0x2 0x400 mmcpart 1;" \
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"boot part 0 1;" \
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"/zImage ext4 0 1;" \
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"/imx6ul-pico-hobbit.dtb ext4 0 1;" \
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"rootfs part 0 2\0" \
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc5\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"fdt_addr=0x83000000\0" \
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"fdt_addr_r=0x83000000\0" \
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"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
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"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
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"ramdisk_addr_r=0x83000000\0" \
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"ramdiskaddr=0x83000000\0" \
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"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
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"mmcautodetect=yes\0" \
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CONFIG_DFU_ENV_SETTINGS \
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"finduuid=part uuid mmc 0:1 uuid\0" \
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"partitions=" \
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"uuid_disk=${uuid_gpt_disk};" \
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"name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \
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"fastboot_partition_alias_system=rootfs\0" \
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"setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \
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BOOTENV
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + SZ_128M
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* I2C configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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/* environment organization */
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 0
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#endif /* __PICO_IMX6UL_CONFIG_H */
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