mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
184 lines
5.3 KiB
C
184 lines
5.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2009
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*/
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#ifndef __CFI_FLASH_H__
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#define __CFI_FLASH_H__
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#define FLASH_CMD_CFI 0x98
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#define FLASH_CMD_READ_ID 0x90
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#define FLASH_CMD_RESET 0xff
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#define FLASH_CMD_BLOCK_ERASE 0x20
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#define FLASH_CMD_ERASE_CONFIRM 0xD0
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#define FLASH_CMD_WRITE 0x40
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#define FLASH_CMD_PROTECT 0x60
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#define FLASH_CMD_SETUP 0x60
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#define FLASH_CMD_SET_CR_CONFIRM 0x03
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#define FLASH_CMD_PROTECT_SET 0x01
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#define FLASH_CMD_PROTECT_CLEAR 0xD0
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#define FLASH_CMD_CLEAR_STATUS 0x50
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#define FLASH_CMD_READ_STATUS 0x70
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#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
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#define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
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#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
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#define FLASH_STATUS_DONE 0x80
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#define FLASH_STATUS_ESS 0x40
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#define FLASH_STATUS_ECLBS 0x20
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#define FLASH_STATUS_PSLBS 0x10
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#define FLASH_STATUS_VPENS 0x08
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#define FLASH_STATUS_PSS 0x04
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#define FLASH_STATUS_DPS 0x02
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#define FLASH_STATUS_R 0x01
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#define FLASH_STATUS_PROTECT 0x01
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#define AMD_CMD_RESET 0xF0
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#define AMD_CMD_WRITE 0xA0
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#define AMD_CMD_ERASE_START 0x80
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#define AMD_CMD_ERASE_SECTOR 0x30
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#define AMD_CMD_UNLOCK_START 0xAA
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#define AMD_CMD_UNLOCK_ACK 0x55
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#define AMD_CMD_WRITE_TO_BUFFER 0x25
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#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
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#define AMD_CMD_SET_PPB_ENTRY 0xC0
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#define AMD_CMD_SET_PPB_EXIT_BC1 0x90
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#define AMD_CMD_SET_PPB_EXIT_BC2 0x00
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#define AMD_CMD_PPB_UNLOCK_BC1 0x80
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#define AMD_CMD_PPB_UNLOCK_BC2 0x30
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#define AMD_CMD_PPB_LOCK_BC1 0xA0
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#define AMD_CMD_PPB_LOCK_BC2 0x00
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#define AMD_STATUS_TOGGLE 0x40
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#define AMD_STATUS_ERROR 0x20
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#define ATM_CMD_UNLOCK_SECT 0x70
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#define ATM_CMD_SOFTLOCK_START 0x80
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#define ATM_CMD_LOCK_SECT 0x40
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#define FLASH_CONTINUATION_CODE 0x7F
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#define FLASH_OFFSET_MANUFACTURER_ID 0x00
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#define FLASH_OFFSET_DEVICE_ID 0x01
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#define FLASH_OFFSET_LOWER_SW_BITS 0x0C
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#define FLASH_OFFSET_DEVICE_ID2 0x0E
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#define FLASH_OFFSET_DEVICE_ID3 0x0F
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#define FLASH_OFFSET_CFI 0x55
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#define FLASH_OFFSET_CFI_ALT 0x555
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#define FLASH_OFFSET_CFI_RESP 0x10
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#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
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/* extended query table primary address */
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#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
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#define FLASH_OFFSET_WTOUT 0x1F
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#define FLASH_OFFSET_WBTOUT 0x20
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#define FLASH_OFFSET_ETOUT 0x21
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#define FLASH_OFFSET_CETOUT 0x22
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#define FLASH_OFFSET_WMAX_TOUT 0x23
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#define FLASH_OFFSET_WBMAX_TOUT 0x24
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#define FLASH_OFFSET_EMAX_TOUT 0x25
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#define FLASH_OFFSET_CEMAX_TOUT 0x26
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#define FLASH_OFFSET_SIZE 0x27
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#define FLASH_OFFSET_INTERFACE 0x28
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#define FLASH_OFFSET_BUFFER_SIZE 0x2A
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#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
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#define FLASH_OFFSET_ERASE_REGIONS 0x2D
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#define FLASH_OFFSET_PROTECT 0x02
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#define FLASH_OFFSET_USER_PROTECTION 0x85
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#define FLASH_OFFSET_INTEL_PROTECTION 0x81
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#define CFI_CMDSET_NONE 0
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#define CFI_CMDSET_INTEL_EXTENDED 1
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#define CFI_CMDSET_AMD_STANDARD 2
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#define CFI_CMDSET_INTEL_STANDARD 3
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#define CFI_CMDSET_AMD_EXTENDED 4
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#define CFI_CMDSET_MITSU_STANDARD 256
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#define CFI_CMDSET_MITSU_EXTENDED 257
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#define CFI_CMDSET_SST 258
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#define CFI_CMDSET_INTEL_PROG_REGIONS 512
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#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
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# undef FLASH_CMD_RESET
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# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
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#endif
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#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
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typedef union {
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u8 w8;
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u16 w16;
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u32 w32;
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u64 w64;
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} cfiword_t;
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/* CFI standard query structure */
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/* The offsets and sizes of this packed structure members correspond
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* to the actual layout in CFI Flash chips. Some 16- and 32-bit members
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* are unaligned and must be accessed with explicit unaligned access macros.
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*/
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struct cfi_qry {
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u8 qry[3];
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u16 p_id; /* unaligned */
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u16 p_adr; /* unaligned */
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u16 a_id; /* unaligned */
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u16 a_adr; /* unaligned */
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u8 vcc_min;
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u8 vcc_max;
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u8 vpp_min;
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u8 vpp_max;
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u8 word_write_timeout_typ;
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u8 buf_write_timeout_typ;
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u8 block_erase_timeout_typ;
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u8 chip_erase_timeout_typ;
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u8 word_write_timeout_max;
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u8 buf_write_timeout_max;
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u8 block_erase_timeout_max;
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u8 chip_erase_timeout_max;
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u8 dev_size;
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u16 interface_desc; /* aligned */
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u16 max_buf_write_size; /* aligned */
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u8 num_erase_regions;
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u32 erase_region_info[NUM_ERASE_REGIONS]; /* unaligned */
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} __attribute__((packed));
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struct cfi_pri_hdr {
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u8 pri[3];
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u8 major_version;
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u8 minor_version;
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} __attribute__((packed));
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#ifndef CONFIG_SYS_FLASH_BANKS_LIST
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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#endif
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/*
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* CFI_MAX_FLASH_BANKS only used for flash_info struct declaration.
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*
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* Use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined
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*/
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#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
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#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks)
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#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
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/* board code can update this variable before CFI detection */
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extern int cfi_flash_num_flash_banks;
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#else
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#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
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#endif
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phys_addr_t cfi_flash_bank_addr(int i);
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unsigned long cfi_flash_bank_size(int i);
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void flash_cmd_reset(flash_info_t *info);
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#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
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void flash_write8(u8 value, void *addr);
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void flash_write16(u16 value, void *addr);
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void flash_write32(u32 value, void *addr);
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void flash_write64(u64 value, void *addr);
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u8 flash_read8(void *addr);
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u16 flash_read16(void *addr);
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u32 flash_read32(void *addr);
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u64 flash_read64(void *addr);
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#endif
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#endif /* __CFI_FLASH_H__ */
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