mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
85 lines
1.9 KiB
C
85 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* DDR3
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*
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* (C) Copyright 2014
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* Texas Instruments Incorporated, <www.ti.com>
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*/
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#ifndef _DDR3_H_
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#define _DDR3_H_
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#include <asm/arch/hardware.h>
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struct ddr3_phy_config {
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unsigned int pllcr;
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unsigned int pgcr1_mask;
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unsigned int pgcr1_val;
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unsigned int ptr0;
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unsigned int ptr1;
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unsigned int ptr2;
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unsigned int ptr3;
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unsigned int ptr4;
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unsigned int dcr_mask;
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unsigned int dcr_val;
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unsigned int dtpr0;
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unsigned int dtpr1;
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unsigned int dtpr2;
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unsigned int mr0;
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unsigned int mr1;
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unsigned int mr2;
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unsigned int dtcr;
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unsigned int pgcr2;
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unsigned int zq0cr1;
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unsigned int zq1cr1;
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unsigned int zq2cr1;
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unsigned int pir_v1;
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unsigned int datx8_2_mask;
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unsigned int datx8_2_val;
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unsigned int datx8_3_mask;
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unsigned int datx8_3_val;
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unsigned int datx8_4_mask;
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unsigned int datx8_4_val;
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unsigned int datx8_5_mask;
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unsigned int datx8_5_val;
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unsigned int datx8_6_mask;
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unsigned int datx8_6_val;
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unsigned int datx8_7_mask;
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unsigned int datx8_7_val;
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unsigned int datx8_8_mask;
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unsigned int datx8_8_val;
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unsigned int pir_v2;
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};
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struct ddr3_emif_config {
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unsigned int sdcfg;
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unsigned int sdtim1;
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unsigned int sdtim2;
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unsigned int sdtim3;
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unsigned int sdtim4;
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unsigned int zqcfg;
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unsigned int sdrfc;
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};
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struct ddr3_spd_cb {
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char dimm_name[32];
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struct ddr3_phy_config phy_cfg;
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struct ddr3_emif_config emif_cfg;
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unsigned int ddrspdclock;
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int ddr_size_gbyte;
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};
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u32 ddr3_init(void);
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void ddr3_reset_ddrphy(void);
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void ddr3_init_ecc(u32 base, u32 ddr3_size);
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void ddr3_disable_ecc(u32 base);
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void ddr3_check_ecc_int(u32 base);
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int ddr3_ecc_support_rmw(u32 base);
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void ddr3_err_reset_workaround(void);
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void ddr3_enable_ecc(u32 base, int test);
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void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg);
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void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg);
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int ddr3_get_size(void);
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#endif
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