mirror of
https://github.com/brain-hackers/u-boot-brain
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3675ac081a
Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
88 lines
2.1 KiB
Plaintext
88 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
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/dts-v1/;
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#include "imx6ull.dtsi"
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/ {
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model = "O4-iMX6ULL-NANO";
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compatible = "out4,o4-imx6ull-nano", "fsl,imx6ull";
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aliases {
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mmc0 = &usdhc2;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x20000000>;
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};
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};
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&iomuxc {
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17059
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
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MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
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MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
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MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
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MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
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MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
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MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
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MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
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MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
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MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
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MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
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MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
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>;
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};
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pinctrl_fec2: fec2grp {
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fsl,pins = <
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MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
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MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
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MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
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MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
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MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
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MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
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MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
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>;
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};
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pinctrl_phy0_irq: phy0grp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x79
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>;
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};
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pinctrl_phy1_irq: phy1grp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79
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>;
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};
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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no-1-8-v;
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non-removable;
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keep-power-in-suspend;
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wakeup-source;
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bus-width = <8>;
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status = "okay";
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};
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