mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
82239aa7cd
Add JTAG recovery support into the M2 Porter TPL. This allows the TPL to be loaded over JTAG, initialize the system, wait for the JTAG debugger to load U-Boot image into RAM and then resume and start U-Boot from RAM. The procedure is as follows: 1) Load u-boot-tpl.bin to 0xe6300000 2) Write magic number 0x1337c0de to 0xe6300020 TPL checks for this particular magic and starts JTAG recovery if this number is present. This is not present by default. 3) Start U-Boot TPL from 0xe6300000 4) Wait for a message from TPL on UART indicating JTAG boot: "JTAG boot detected!" 5) Halt the system in JTAG debugger 6) Load U-Boot image (u-boot.img) to 0x4fffffc0 7) Write magic number 0xb33fc0de to 0xe6300024 TPL checks for this particular magic to verify that the U-Boot image was loaded into DRAM by the JTAG debugger. 8) Resume the system in JTAG debugger Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
101 lines
2.3 KiB
Plaintext
101 lines
2.3 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
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CONFIG_ARCH_RMOBILE=y
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CONFIG_SYS_TEXT_BASE=0x50000000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x8000
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CONFIG_R8A7791=y
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CONFIG_TARGET_PORTER=y
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CONFIG_TPL_TEXT_BASE=0xe6300000
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CONFIG_TPL_MAX_SIZE=16384
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_TPL_LIBCOMMON_SUPPORT=y
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CONFIG_TPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL=y
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CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot"
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CONFIG_TPL_SYS_MALLOC_F_LEN=0x2000
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CONFIG_FIT=y
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CONFIG_BOOTDELAY=3
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CONFIG_VERSION_VARIABLE=y
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_TPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SPL_YMODEM_SUPPORT=y
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CONFIG_TPL=y
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CONFIG_TPL_BOARD_INIT=y
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CONFIG_TPL_NEEDS_SEPARATE_TEXT_BASE=y
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CONFIG_TPL_RAM_SUPPORT=y
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CONFIG_TPL_RAM_DEVICE=y
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CONFIG_TPL_SERIAL_SUPPORT=y
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CONFIG_TPL_SPI_FLASH_SUPPORT=y
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CONFIG_TPL_SPI_LOAD=y
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CONFIG_TPL_SPI_SUPPORT=y
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CONFIG_TPL_YMODEM_SUPPORT=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_XIMG is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_SDRAM=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_EMBED=y
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CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas power-domains"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_CLK_RENESAS=y
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CONFIG_DM_GPIO=y
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CONFIG_RCAR_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_RCAR_IIC=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_UNIPHIER=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_MICREL=y
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CONFIG_DM_ETH=y
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CONFIG_SH_ETHER=y
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CONFIG_PCI=y
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CONFIG_DM_PCI=y
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CONFIG_PCI_RCAR_GEN2=y
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CONFIG_PINCTRL=y
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CONFIG_PINCONF=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_PFC=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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# CONFIG_TPL_DM_SERIAL is not set
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SH_QSPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_PCI=y
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CONFIG_USB_STORAGE=y
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CONFIG_TPL_TINY_MEMSET=y
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