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https://github.com/brain-hackers/u-boot-brain
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![]() Current codes assume the OPTEE address is at the end of first DRAM bank. Adjust the process to allow OPTEE in the middle of first bank. When OPTEE memory is removed from first bank, it may split the first bank to two banks, adjust the MMU table for the split case, Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge i.MX8MP evk to default to avoid issue. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Tested-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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imx8mm_beacon.c | ||
Kconfig | ||
lpddr4_timing.c | ||
MAINTAINERS | ||
Makefile | ||
README | ||
spl.c |
U-Boot for the Beacon EmbeddedWorks Devkit Quick Start =========== - Build the ARM Trusted firmware binary - Get ddr firmware - Build U-Boot - Boot Get and Build the ARM Trusted firmware ====================================== Note: $(srctree) is U-Boot source directory $ git clone https://source.codeaurora.org/external/imx/imx-atf $ git checkout imx_4.19.35_1.0.0 $ make PLAT=imx8mm bl31 ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- $ cp build/imx8mm/release/bl31.bin $(srctree) Get the DDR firmware ==================== $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.5.bin $ chmod +x firmware-imx-8.5.bin $ ./firmware-imx-8.5 $ cp firmware-imx-8.5/firmware/ddr/synopsys/lpddr4*.bin $(srctree) Build U-Boot ============ $ make imx8mm_beacon_defconfig $ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000 Burn U-Boot to microSD Card =========================== $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 Boot ==== Set Boot switch to SD boot